DC Field | Value | Language |
---|---|---|
dc.contributor.author | Hwang, Sun-Il | ko |
dc.contributor.author | Chung, Jaehyun | ko |
dc.contributor.author | Kim, Hyeon-June | ko |
dc.contributor.author | Jang, Il Hoon | ko |
dc.contributor.author | Seo, Min-Jae | ko |
dc.contributor.author | Cho, Sang-Hyun | ko |
dc.contributor.author | Kang, Heewon | ko |
dc.contributor.author | Kwon, Minho | ko |
dc.contributor.author | Ryu, Seung-Tak | ko |
dc.date.accessioned | 2018-03-23T00:14:37Z | - |
dc.date.available | 2018-03-23T00:14:37Z | - |
dc.date.created | 2018-03-20 | - |
dc.date.created | 2018-03-20 | - |
dc.date.issued | 2018-03 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON ELECTRON DEVICES, v.65, no.3, pp.1119 - 1126 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | http://hdl.handle.net/10203/240924 | - |
dc.description.abstract | This paper presents a CMOS image sensor (CIS) utilizing a noise-shaping successive-approximation register analog-to-digital converter (SAR ADC) incorporating the delta-readout scheme. While the noise-shaping SAR ADC with a proposed two-tap passive finite-impulse response (FIR) filter improves effective resolution, the delta-readout scheme reduces its power consumption. A prototype 1920 x 1440 pixel CIS was fabricated in a 90-nm CIS process. A single-channel readout SAR ADC occupying an area of 22.4 mu mx 715 mu m was implemented for reading out 16 columns of pixel array, consuming 437 mu W. Owing to the proposed noise-shaping SAR ADC with oversampling ratio of 16, this paper achieves a noise reduction of 14 dB compared with the noise of a conventional SAR ADC. The delta-readout reduces the power consumption of the SAR ADC by 10% due to the high hit rate of the full high definition image format. The measured differential nonlinearity of the ADC is + 0.77/-0.54 LSB and the integral nonlinearity is + 0.81/-0.5 LSB. The prototype CIS consumes a total power of 64 mW and achieves a dynamic range of 66.5 dB and a figure of merit of 127 mu V.nJ at a data rate of 138 Mpixels/s. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | DELTA-SIGMA ADC | - |
dc.subject | SNDR | - |
dc.title | A 2.7-M Pixels 64-mW CMOS Image Sensor With Multicolumn-Parallel Noise-Shaping SAR ADCs | - |
dc.type | Article | - |
dc.identifier.wosid | 000425996300045 | - |
dc.identifier.scopusid | 2-s2.0-85041505555 | - |
dc.type.rims | ART | - |
dc.citation.volume | 65 | - |
dc.citation.issue | 3 | - |
dc.citation.beginningpage | 1119 | - |
dc.citation.endingpage | 1126 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.identifier.doi | 10.1109/TED.2018.2795005 | - |
dc.contributor.localauthor | Ryu, Seung-Tak | - |
dc.contributor.nonIdAuthor | Cho, Sang-Hyun | - |
dc.contributor.nonIdAuthor | Kang, Heewon | - |
dc.contributor.nonIdAuthor | Kwon, Minho | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | CMOS image sensor (CIS) | - |
dc.subject.keywordAuthor | delta-readout scheme | - |
dc.subject.keywordAuthor | noise-shaping successive-approximation register analog-to-digital converter (SAR ADC) | - |
dc.subject.keywordAuthor | oversampling | - |
dc.subject.keywordPlus | DELTA-SIGMA ADC | - |
dc.subject.keywordPlus | SNDR | - |
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