Flat field emitter displays

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Disclosed are flat panel field emitter displays whose unit cell structure adopt a planar cathode structure in stead of a conventional microtip structure, so as to increase the degree of integration and can be operated at low operation voltages at high speeds. In the structure, a channel insulator is formed below the cathode and underlaid by a gate. By means of the gate voltage, the electron emission from the cathode can be controlled. The electrodes in the structure are arranged in the order of anode, cathode and gate, allowing the simplification of processes. With the ease of controlling the distance between electrodes, the displays can be applied for almost all video systems from small sizes to large screen area displays, in place of conventional displays. The displays allows conventional semiconductor processes and facilities to be utilized as they are.
Assignee
KAIST
Country
US (United States)
Issue Date
2004-04-27
Application Date
2000-09-20
Application Number
09646730
Registration Date
2004-04-27
Registration Number
6727642
URI
http://hdl.handle.net/10203/236494
Appears in Collection
EE-Patent(특허)
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