Enhanced all digital phase-locked loop and oscillation signal generation method thereof 스퍼를 감소시킨 올-디지털 피엘엘 및 이를 이용한 발진 신호 발생 방법

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An All Digital PLL (ADPLL) and oscillation signal generation method using the ADPLL is provided for generating a spur-free oscillation signal by improving the frequency resolution of the ADPLL. An all digital phase-locked loop of the present invention includes a digitally controlled oscillator for generating an oscillation signal having a frequency corresponding to an inputted control signal, a re-timer for retiming a reference clock based on the oscillation signal, a feedback circuit for accumulating a number of clocks of the oscillation signal within a time period and generating a phase information of the oscillation signal in synchronization with the retimed reference clock, a sigma-delta modulator for sigma-delta modulating a frequency command signal into a modulation signal having a less number of bits than a number of bits of the frequency command signal, a reference phase accumulator for accumulating phases corresponding to the modulation signal, a phase difference detector for generating a phase difference information between an output signal of the reference phase accumulator and the phase information, and a digital loop filter for filtering the phase difference information to generate the control signal.
Assignee
KAIST
Country
US (United States)
Issue Date
2010-07-06
Application Date
2008-11-04
Application Number
12264811
Registration Date
2010-07-06
Registration Number
7750742
URI
http://hdl.handle.net/10203/235139
Appears in Collection
EE-Patent(특허)
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