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Exploration of Ternary Logic Using T-CMOS for Circuit-Level Design Ko, Jonghyun; Kim, Jongbeom; Jeong, Taegam; Jeong, Jaehoon; Song, Taigon, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.70, no.9, pp.3612 - 3624, 2023-09 |
More Power Reduction With 3-Tier Logic-on-Logic 3-D ICs Song, Taigon; Panth, Shreepad; Chae, Yoo-Jin; Lim, Sung Kyu, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.35, no.12, pp.2056 - 2067, 2016-12 |
Three-tier 3D ICs for more power reduction: Strategies in CAD, design, and bonding selection Song, Taigon; Panth, Shreepad; Chae, Yoo-Jin; Lim, Sung Kyu, 34th IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015, pp.752 - 757, ACM SIGDA and IEEE CEDA, 2015-11 |
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