Browse "RIMS Collection" by Author Taewhan Kim
Showing results 32 to 41 of 41
| Low Power Bus Encoding with Crosstalk Delay Elimination Taewhan Kim, IEEE ASIC/SOC Conference (ASIC), IEEE, 2002-09 |
| Memory Exploration utilizing Scheduling Effects in High-level Synthesis Taewhan Kim, IEEE International Symposium on Circuits and Systems, IEEE, 2002-05 |
| Memory Layout Technique for Variables Utilizing Efficient DRAM Access Modes in Embedded System Design Taewhan Kim, IEEE/ACM Design Automation Conference (DAC), pp.881 - 886, 2003 |
| Optimal Voltage Allocation Techniques for Dynamically Variable Voltage Processors Taewhan Kim, IEEE/ACM Design Automation Conference (DAC), pp.125 - 130, 2003 |
| Phase Assignment for the Synthesis of Low Power Domino Circuits Priyadasan Patra; Unni Narayanan; Taewhan Kim, ELECTRONICS LETTERS, v.37, no.13, pp.814 - 816, 2001-06 |
| Power Optimization in VLSI Design based on Efficient Network Flow Computations Taewhan Kim, 6th Korea-Japan Workshop on ALgorithms and Computation, pp.3 - 8, 2001 |
| Register Allocation for Dataflow Graphs with Conditional Branches and Loops Taewhan Kim, IEEE European Design Automation Conference (Euro-DAC), pp.232 - 237, 1993 |
| Utilization of Carry-Save Adders in Arithmetic Optimization Taewhan Kim, IEEE International ASIC/SOC Conference (ASIC), pp.173 - 177, 1999 |
| Utilization of Multiport Memories in Data Path Synthesis Taewhan Kim, ACM/IEEE Design Automation Conference (DAC), pp.298 - 302, 1993 |
| Wallace-Tree based Timing-Driven Synthesis of Arithmetic Circuits Taewhan Kim, IEEE International Conference on VLSI and CAD (VLSICAD), pp.89 - 94, 1999 |
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Open Access
- 223 OA Article
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- 2,339 2000 - 2009
- 1,846 1990 - 1999
- 579 1980 - 1989
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