SEMICONDUCTOR DEVICE HAVING JUNCTIONLESS VERTICAL GATE TRANSISTOR AND METHOD OF MANUFACTURING THE SAME무접합 수직 게이트 트랜지스터를 갖는 반도체 소자 및 그 제조방법

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dc.contributor.authorMoon, Jung-Minko
dc.contributor.authorKim, Tae-Kyunko
dc.contributor.authorLee, Seok-Heeko
dc.date.accessioned2017-12-20T07:30:09Z-
dc.date.available2017-12-20T07:30:09Z-
dc.date.issued2015-09-15-
dc.identifier.urihttp://hdl.handle.net/10203/231488-
dc.description.abstractA junctionless vertical gate transistor includes an active pillar vertically protruding from a substrate and including a first impurity region, a second impurity region and a third impurity region sequentially formed over the first impurity region; gate electrodes coupled to sidewalls of the second impurity region; and bit lines arranged in a direction of intersecting with the gate electrodes and each contacting the first impurity region. The first to the third impurity regions include impurities of the same polarity.-
dc.titleSEMICONDUCTOR DEVICE HAVING JUNCTIONLESS VERTICAL GATE TRANSISTOR AND METHOD OF MANUFACTURING THE SAME-
dc.title.alternative무접합 수직 게이트 트랜지스터를 갖는 반도체 소자 및 그 제조방법-
dc.typePatent-
dc.type.rimsPAT-
dc.contributor.localauthorLee, Seok-Hee-
dc.contributor.nonIdAuthorMoon, Jung-Min-
dc.contributor.nonIdAuthorKim, Tae-Kyun-
dc.contributor.assigneeKAIST-
dc.identifier.iprsType특허-
dc.identifier.patentApplicationNumber13759395-
dc.identifier.patentRegistrationNumber9136376-
dc.date.application2013-02-05-
dc.date.registration2015-09-15-
dc.publisher.countryUS-
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EE-Patent(특허)
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