DC Field | Value | Language |
---|---|---|
dc.contributor.author | Hur, Jae | ko |
dc.contributor.author | Jeong, Woo Jin | ko |
dc.contributor.author | Shin, Mincheol | ko |
dc.contributor.author | Choi, Yang-Kyu | ko |
dc.date.accessioned | 2017-12-19T00:57:34Z | - |
dc.date.available | 2017-12-19T00:57:34Z | - |
dc.date.created | 2017-11-29 | - |
dc.date.created | 2017-11-29 | - |
dc.date.issued | 2017-12 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON ELECTRON DEVICES, v.64, no.12, pp.5223 - 5229 | - |
dc.identifier.issn | 0018-9383 | - |
dc.identifier.uri | http://hdl.handle.net/10203/228430 | - |
dc.description.abstract | Tunnel FETs (TFETs) have attracted a great deal of attention due to their steep subthreshold swing (SS) of less than 60 mV/dec, which overcomes the theoretical constraint imposed by the thermal limit in a conventional inversion-mode (IM) FET. Based on its advantages as a short-channel device with low stand-by power consumption, TFETs shows promise to replace IM-FETs. As the channel length is shortened to minimize the total gate pitch; however, the gate sidewall spacer is miniaturized as well. In this paper, the influence of junction extension length (L-ext) on TFET behavior is discussed where the length of the gate spacer is assumed to be the gap between the source and drain (S/D) electrodes and the gate edge. It was found that, when L-ext is aggressively scaled down, having S/D electrodes (silicide or metal) with identical work functions (WFs) leads to a severely high OFF-current (I-OFF) and high SS. By adopting separate asymmetric WFs for the p-type and n-type S/D electrodes, the on/off characteristics were improved with suppressed IOFF and steeper slopes. Itwas also shownthat thedeviceperformanceof a TFET with higher source-side doping concentrations (similar to 5 x10(20) cm(-3)) can be further improved even at the aggressively scaled-down L-ext by boosting the on-current. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | FIELD-EFFECT TRANSISTORS | - |
dc.subject | DESIGN | - |
dc.subject | ANNEAL | - |
dc.subject | TFETS | - |
dc.subject | NM | - |
dc.title | Schottky Tunneling Effects in a Tunnel FET | - |
dc.type | Article | - |
dc.identifier.wosid | 000417727500059 | - |
dc.identifier.scopusid | 2-s2.0-85031797851 | - |
dc.type.rims | ART | - |
dc.citation.volume | 64 | - |
dc.citation.issue | 12 | - |
dc.citation.beginningpage | 5223 | - |
dc.citation.endingpage | 5229 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON ELECTRON DEVICES | - |
dc.identifier.doi | 10.1109/TED.2017.2757260 | - |
dc.contributor.localauthor | Shin, Mincheol | - |
dc.contributor.localauthor | Choi, Yang-Kyu | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Band-to-band tunneling (BTBT) | - |
dc.subject.keywordAuthor | tunnel FET (TFET) | - |
dc.subject.keywordAuthor | universal Schottky tunneling (UST) | - |
dc.subject.keywordPlus | FIELD-EFFECT TRANSISTORS | - |
dc.subject.keywordPlus | DESIGN | - |
dc.subject.keywordPlus | ANNEAL | - |
dc.subject.keywordPlus | TFETS | - |
dc.subject.keywordPlus | NM | - |
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