DC Field | Value | Language |
---|---|---|
dc.contributor.author | Piersanti, Stefano | ko |
dc.contributor.author | Pellegrino, Enza | ko |
dc.contributor.author | de Paulis, Francesco | ko |
dc.contributor.author | Orlandi, Antonio | ko |
dc.contributor.author | Jung, Daniel Hyunsuk | ko |
dc.contributor.author | Kim, Dong-Hyun | ko |
dc.contributor.author | Kim, Joungho | ko |
dc.contributor.author | Fan, Jun | ko |
dc.date.accessioned | 2017-06-05T02:03:50Z | - |
dc.date.available | 2017-06-05T02:03:50Z | - |
dc.date.created | 2017-05-22 | - |
dc.date.created | 2017-05-22 | - |
dc.date.created | 2017-05-22 | - |
dc.date.issued | 2017-08 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, v.59, no.4, pp.1329 - 1338 | - |
dc.identifier.issn | 0018-9375 | - |
dc.identifier.uri | http://hdl.handle.net/10203/223817 | - |
dc.description.abstract | This paper explains the extraction from the measurement of the parameters necessary in time domain to identify the hysteretic behavior of the coupling capacitance of through silicon vias (TSVs). The algorithm was developed in such a way that the equivalent capacitance model can be implemented into standard circuit simulators. A comparison with a known procedure based on the genetic algorithm approach is offered as validation. Results showing the robustness of the algorithm and the effects of the hysteresis on the crosstalk among TSV and integrated circuit active devices are reported and discussed. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | COMPUTATIONAL ELECTROMAGNETICS CEM | - |
dc.subject | SELECTIVE VALIDATION FSV | - |
dc.subject | SILICON | - |
dc.title | Algorithm for Extracting Parameters of the Coupling Capacitance Hysteresis Cycle for TSV Transient Modeling and Robustness Analysis | - |
dc.type | Article | - |
dc.identifier.wosid | 000399932700008 | - |
dc.identifier.scopusid | 2-s2.0-84995584049 | - |
dc.type.rims | ART | - |
dc.citation.volume | 59 | - |
dc.citation.issue | 4 | - |
dc.citation.beginningpage | 1329 | - |
dc.citation.endingpage | 1338 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY | - |
dc.identifier.doi | 10.1109/TEMC.2016.2621259 | - |
dc.contributor.localauthor | Kim, Joungho | - |
dc.contributor.nonIdAuthor | Piersanti, Stefano | - |
dc.contributor.nonIdAuthor | Pellegrino, Enza | - |
dc.contributor.nonIdAuthor | de Paulis, Francesco | - |
dc.contributor.nonIdAuthor | Orlandi, Antonio | - |
dc.contributor.nonIdAuthor | Kim, Dong-Hyun | - |
dc.contributor.nonIdAuthor | Fan, Jun | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Active devices | - |
dc.subject.keywordAuthor | dielectric hysteresis | - |
dc.subject.keywordAuthor | equivalent circuit modeling | - |
dc.subject.keywordAuthor | genetic algorithm (GA) | - |
dc.subject.keywordAuthor | nonlinear effects | - |
dc.subject.keywordAuthor | robustness analysis | - |
dc.subject.keywordAuthor | signal integrity | - |
dc.subject.keywordAuthor | through silicon vias (TSVs) | - |
dc.subject.keywordAuthor | time domain | - |
dc.subject.keywordPlus | COMPUTATIONAL ELECTROMAGNETICS CEM | - |
dc.subject.keywordPlus | SELECTIVE VALIDATION FSV | - |
dc.subject.keywordPlus | SILICON | - |
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