DC Field | Value | Language |
---|---|---|
dc.contributor.author | Hong, Seul Ki | ko |
dc.contributor.author | Oh, Joong Gun | ko |
dc.contributor.author | Hwang, Wan Sik | ko |
dc.contributor.author | Cho, Byung-Jin | ko |
dc.date.accessioned | 2017-05-10T04:15:18Z | - |
dc.date.available | 2017-05-10T04:15:18Z | - |
dc.date.created | 2017-04-11 | - |
dc.date.created | 2017-04-11 | - |
dc.date.created | 2017-04-11 | - |
dc.date.issued | 2017-04 | - |
dc.identifier.citation | SEMICONDUCTOR SCIENCE AND TECHNOLOGY, v.32, no.4 | - |
dc.identifier.issn | 0268-1242 | - |
dc.identifier.uri | http://hdl.handle.net/10203/223591 | - |
dc.description.abstract | The state-of-the-art performance of a graphene radio-frequency (RF) field-effect transistor (FET) made of chemical vapor deposition (CVD) graphene is presented. The record high cut-off frequency as high as 380 GHz using CVD graphene was attributed to the implementation of advanced process integration. On the one hand, interface engineering has become critical in twodimensional (2D) electronics since the charge transport of a 2D electron system like graphene is highly affected by the interface. The interface engineering was made for both the top and bottom of the graphene surface by implementing a non-polar material (1, 3, 5-trimethyl-1, 3, 5-trivinyl cyclotrisiloxane). In contrast to conventional polar materials, such as SiO2, the non-polar materials significantly reduce the surface optical phonon scattering in the graphene channel, leading to the enhanced RF performance of graphene FET. On the other hand, micro-scaled holes over the multilayer graphene and self-aligned structure also become a critical factor in minimizing the parasitic resistance that is inversely proportional to RF performance. As the growth technique of CVD graphene greatly advances, the advanced process integration scheme could bring graphene electronics one step further towards practical application. | - |
dc.language | English | - |
dc.publisher | IOP PUBLISHING LTD | - |
dc.title | Enhanced performance in graphene RF transistors via advanced process integration | - |
dc.type | Article | - |
dc.identifier.wosid | 000398633200002 | - |
dc.identifier.scopusid | 2-s2.0-85016989453 | - |
dc.type.rims | ART | - |
dc.citation.volume | 32 | - |
dc.citation.issue | 4 | - |
dc.citation.publicationname | SEMICONDUCTOR SCIENCE AND TECHNOLOGY | - |
dc.identifier.doi | 10.1088/1361-6641/aa5f39 | - |
dc.contributor.localauthor | Cho, Byung-Jin | - |
dc.contributor.nonIdAuthor | Hwang, Wan Sik | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | graphene RF transistor | - |
dc.subject.keywordAuthor | RF field effect transistor | - |
dc.subject.keywordAuthor | non-polar materials | - |
dc.subject.keywordAuthor | CVD graphene | - |
dc.subject.keywordAuthor | process integration | - |
dc.subject.keywordPlus | FIELD-EFFECT TRANSISTORS | - |
dc.subject.keywordPlus | HIGH-FREQUENCY | - |
dc.subject.keywordPlus | MONOLAYER GRAPHENE | - |
dc.subject.keywordPlus | GATE DIELECTRICS | - |
dc.subject.keywordPlus | PAD PARASITICS | - |
dc.subject.keywordPlus | ELECTRONICS | - |
dc.subject.keywordPlus | DEVICES | - |
dc.subject.keywordPlus | ACCOUNT | - |
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