DC Field | Value | Language |
---|---|---|
dc.contributor.author | Shin, DH | ko |
dc.contributor.author | Lee, YM | ko |
dc.contributor.author | Kim, KH | ko |
dc.contributor.author | Lee, Kwyro | ko |
dc.date.accessioned | 2011-02-09T08:15:33Z | - |
dc.date.available | 2011-02-09T08:15:33Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 1999-08 | - |
dc.identifier.citation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.34, no.8, pp.1171 - 1175 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.uri | http://hdl.handle.net/10203/22031 | - |
dc.description.abstract | An NMOS diode clamped termination (NDCT) with NMOS threshold voltage (V-th) of around 0 V is proposed as a dynamic termination for a high-speed/low-power chip-to-chip interconnection scheme. Both simulation and experimental results for several benchmark circuits show that, compared with open termination, the magnitudes of both overshoot and undershoot for nanosecond-range input pulses are typically less than similar to 15% of supply voltage (V-cc = 3.3 V) with the same order of magnitude in pou er saving, Last, the NDCT is found to be very immune to electrostatic discharge, guaranteeing more than 3000 V for a human body model, Our results demonstrate the potentiality of NDCT as the high-speed interconnection scheme. | - |
dc.description.sponsorship | The authors wish to acknowledge the useful comments from the reviewers on the potential problems due to the nonideality of the NMOS diode. | en |
dc.language | English | - |
dc.language.iso | en_US | en |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | Low-power dynamic termination scheme using NMOS diode clamping | - |
dc.type | Article | - |
dc.identifier.wosid | 000081755500017 | - |
dc.identifier.scopusid | 2-s2.0-0033169543 | - |
dc.type.rims | ART | - |
dc.citation.volume | 34 | - |
dc.citation.issue | 8 | - |
dc.citation.beginningpage | 1171 | - |
dc.citation.endingpage | 1175 | - |
dc.citation.publicationname | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Lee, Kwyro | - |
dc.contributor.nonIdAuthor | Shin, DH | - |
dc.contributor.nonIdAuthor | Lee, YM | - |
dc.contributor.nonIdAuthor | Kim, KH | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | dynamic termination | - |
dc.subject.keywordAuthor | high speed | - |
dc.subject.keywordAuthor | low distortion | - |
dc.subject.keywordAuthor | low power | - |
dc.subject.keywordAuthor | NMOS diode clamped termination (NDCT) | - |
dc.subject.keywordAuthor | transmission line | - |
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