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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

Analysis on Via Design for Impedance Mismatch Minimization in High Speed Channel

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dc.contributor.authorLim, Jaeminko
dc.contributor.authorKim, Jounghoko
dc.contributor.authorKim, Heegonko
dc.contributor.authorKim, Dong-Hyunko
dc.contributor.authorJeon, Yeseulko
dc.contributor.authorKoh, Wee Jinko
dc.contributor.authorChang Weng Yew Richardko
dc.date.accessioned2017-01-03T07:19:30Z-
dc.date.available2017-01-03T07:19:30Z-
dc.date.created2016-11-21-
dc.date.issued2016-05-19-
dc.identifier.citationAsia-Pacific International Symposium on Electromagnetic Compatibility & Signal Integrity and Technical Exhibition (APEMC 2016)-
dc.identifier.urihttp://hdl.handle.net/10203/215574-
dc.languageEnglish-
dc.publisherAsia-Pacific International Symposium on Electromagnetic Compatibility & Signal Integrity and Technical Exhibition (APEMC 2016)-
dc.titleAnalysis on Via Design for Impedance Mismatch Minimization in High Speed Channel-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.publicationnameAsia-Pacific International Symposium on Electromagnetic Compatibility & Signal Integrity and Technical Exhibition (APEMC 2016)-
dc.identifier.conferencecountryCC-
dc.identifier.conferencelocationShenzhen Convention and Exhibition Center-
dc.contributor.localauthorKim, Joungho-
dc.contributor.nonIdAuthorLim, Jaemin-
dc.contributor.nonIdAuthorKim, Heegon-
dc.contributor.nonIdAuthorKim, Dong-Hyun-
dc.contributor.nonIdAuthorJeon, Yeseul-
dc.contributor.nonIdAuthorKoh, Wee Jin-
dc.contributor.nonIdAuthorChang Weng Yew Richard-
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EE-Conference Papers(학술회의논문)
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