DC Field | Value | Language |
---|---|---|
dc.contributor.author | Song, Youngsoo | ko |
dc.contributor.author | Shin, Youngsoo | ko |
dc.date.accessioned | 2016-12-14T00:54:25Z | - |
dc.date.available | 2016-12-14T00:54:25Z | - |
dc.date.created | 2016-11-21 | - |
dc.date.created | 2016-11-21 | - |
dc.date.issued | 2017-03-27 | - |
dc.identifier.citation | 20th Design, Automation and Test in Europe, DATE 2017, pp.1639 - 1642 | - |
dc.identifier.uri | http://hdl.handle.net/10203/214683 | - |
dc.description.abstract | Wire width optimization for SADP process is addressed, which involves a decision of how cut- and block-masks should form; a goal is to reduce wire delay in timing critical paths. The problem is formulated using a graph: a vertex corresponds to wire segment with its maximum length for widening as a vertex weight; an edge represents a potential conflict between two candidate wire segments that we wish to widen. A maximum weight independent set corresponds to an ideal solution. For a few circuits that we test, wire resistance of timing critical nets is reduced by 18.5% on average, which leads to 9.9% reduction in clock period. | - |
dc.language | English | - |
dc.publisher | Institute of Electrical and Electronics Engineers Inc. | - |
dc.title | Timing-aware wire width optimization for SADP process | - |
dc.type | Conference | - |
dc.identifier.wosid | 000404171500307 | - |
dc.identifier.scopusid | 2-s2.0-85020202155 | - |
dc.type.rims | CONF | - |
dc.citation.beginningpage | 1639 | - |
dc.citation.endingpage | 1642 | - |
dc.citation.publicationname | 20th Design, Automation and Test in Europe, DATE 2017 | - |
dc.identifier.conferencecountry | SZ | - |
dc.identifier.conferencelocation | SwissTech Convention CenterSwisstech, Lausanne | - |
dc.contributor.localauthor | Shin, Youngsoo | - |
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