DC Field | Value | Language |
---|---|---|
dc.contributor.author | Park, Seongwook | ko |
dc.contributor.author | Hong, Injoon | ko |
dc.contributor.author | Park, Junyoung | ko |
dc.contributor.author | Yoo, Hoi-Jun | ko |
dc.date.accessioned | 2016-11-30T08:34:00Z | - |
dc.date.available | 2016-11-30T08:34:00Z | - |
dc.date.created | 2016-11-16 | - |
dc.date.created | 2016-11-16 | - |
dc.date.issued | 2016-10 | - |
dc.identifier.citation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.51, no.10, pp.2380 - 2388 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.uri | http://hdl.handle.net/10203/214238 | - |
dc.description.abstract | An energy-efficient Deep Neural Network (DNN) processor is proposed for high-speed Visual Attention (VA) engine in a mobile vision recognition SoC. The proposed embedded DNN (E-DNN) processor realizes VA to rapidly find Region-Of-Interest (ROI) tiles of potential target objects to reduce similar to 70% of recognition workloads of a vision recognition SoC. Compared to the previous scale-invariant feature transform (SIFT) based VA models, the proposed E-DNN VA model reduces the execution time by similar to 90%, which results in 73.4% reduction of the overall object recognition (OR) processing time. Also, the proposed E-DNN VA model shows similar to 4% higher OR accuracy for 113-object database (13 laboratory object database + COIL-100 objects database) than the previous model shows. Highly-parallel 200-way PEs are implemented in the E-DNN processor with 2D-axis layer sliding architecture, and only similar to 3 ms of the E-DNN VA latency can be obtained. In addition, the dual-mode configurable PE architecture is proposed to support both Convolution Neural Network (CNN) and Multi-Layer Perceptron (MLP) by utilizing the same hardware resources for high energy efficiency. As a result, the implemented E-DNN processor achieves only 1.9 nJ/pixel energy efficiency which is 7.7x smaller than the state-of-the-art VA accelerator which showed 14.6 nJ/pixel energy efficiency | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | An Energy-Efficient Embedded Deep Neural Network Processor for High Speed Visual Attention in Mobile Vision Recognition SoC | - |
dc.type | Article | - |
dc.identifier.wosid | 000385240200017 | - |
dc.identifier.scopusid | 2-s2.0-84979950242 | - |
dc.type.rims | ART | - |
dc.citation.volume | 51 | - |
dc.citation.issue | 10 | - |
dc.citation.beginningpage | 2380 | - |
dc.citation.endingpage | 2388 | - |
dc.citation.publicationname | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
dc.identifier.doi | 10.1109/JSSC.2016.2582864 | - |
dc.contributor.localauthor | Yoo, Hoi-Jun | - |
dc.contributor.nonIdAuthor | Park, Junyoung | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Deep neural networks | - |
dc.subject.keywordAuthor | mobile SoC | - |
dc.subject.keywordAuthor | object recognition | - |
dc.subject.keywordAuthor | sparse coding | - |
dc.subject.keywordAuthor | visual attention | - |
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