Active Silicon Interposer Design for Interposer-Level Wireless Power Transfer Technology for High-Density 2.5-D and 3-D ICs

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dc.contributor.authorSong, Jinwookko
dc.contributor.authorPark, Shinyoungko
dc.contributor.authorKim, Sukjinko
dc.contributor.authorKim, Jonghoon J.ko
dc.contributor.authorKim, Jounghoko
dc.date.accessioned2016-11-29T05:12:37Z-
dc.date.available2016-11-29T05:12:37Z-
dc.date.created2016-11-08-
dc.date.created2016-11-08-
dc.date.issued2016-08-
dc.identifier.citationIEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.6, no.8, pp.1148 - 1161-
dc.identifier.issn2156-3950-
dc.identifier.urihttp://hdl.handle.net/10203/214126-
dc.description.abstractIn this paper, we first propose and demonstrate an interposer-level wireless power transfer (WPT) scheme to reduce the number of wired power supply interconnections for high-density silicon interposer-based 2.5-D and 3-U integrated circuits (2.5-D and 3-D ICs). We first suggest the concept of an active silicon interposer, fabricate it with active circuits for WPT, and finally proved its WPT operation. The active circuits are the rectifier and dc-dc converter designed with 0.18-mu m SK-Hynix CMOS process to convert wirelessly delivered ac power from a printed circuit board (PCB) package into dc power. We improved the power transfer efficiency by applying magnetic field resonance coupling with proper coil structure selection. The equivalent circuit model of the WPT interconnection scheme is suggested with analytic equations. For experimental demonstration, the fabricated active silicon interposer is attached on PCB package. The average dc output voltage of the designed CMOS rectifier with an MIM smoothing capacitor was measured 2.21 V, and that of the designed dc-dc converter was measured 1 V, which is a suitable voltage level for 1 V devices in 2.5-D and 3-D ICs-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.titleActive Silicon Interposer Design for Interposer-Level Wireless Power Transfer Technology for High-Density 2.5-D and 3-D ICs-
dc.typeArticle-
dc.identifier.wosid000384647100002-
dc.identifier.scopusid2-s2.0-84979072447-
dc.type.rimsART-
dc.citation.volume6-
dc.citation.issue8-
dc.citation.beginningpage1148-
dc.citation.endingpage1161-
dc.citation.publicationnameIEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY-
dc.identifier.doi10.1109/TCPMT.2016.2582904-
dc.contributor.localauthorKim, Joungho-
dc.contributor.nonIdAuthorPark, Shinyoung-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
dc.subject.keywordAuthor3-D integrated circuit (3-D IC)-
dc.subject.keywordAuthoractive silicon interposer-
dc.subject.keywordAuthorCMOS dc-dc converter-
dc.subject.keywordAuthorCMOS full-bridge rectifier-
dc.subject.keywordAuthormagnetic field resonance coupling-
dc.subject.keywordAuthorwireless power transfer-
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