Highly linear and low noise 2.4 GHz RF front-end circuits using transformer and vertical NPNBJT

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The proposed RF front-end circuits consist of a low noise amplifier using an on-chip transformer and a downconversion mixer using a parasitic vertical bipolar junction transistor and have been implemented in 0.18 mu m deep n-well CMOS process. A gain of 33 dB, an IIP3 of -12 dBm, and a DSB noise figure of 4.5 dB have been achieved while consuming 5 mW from a 1.8 V supply.
Publisher
INST ENGINEERING TECHNOLOGY-IET
Issue Date
2007-01
Language
English
Article Type
Article
Keywords

RECEIVER; CMOS

Citation

ELECTRONICS LETTERS, v.43, pp.103 - 105

ISSN
0013-5194
DOI
10.1049/el:20072779
URI
http://hdl.handle.net/10203/21321
Appears in Collection
EE-Journal Papers(저널논문)
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