High-Frequency Temperature-Dependent Through-Silicon-Via (TSV) Model and High-Speed Channel Performance for 3-D ICs

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dc.contributor.authorLee, Man Hoko
dc.contributor.authorJung, Daniel Hyunsukko
dc.contributor.authorKim, Hee-Gonko
dc.contributor.authorCho, Jong-Hyunko
dc.contributor.authorKim, Jounghoko
dc.date.accessioned2016-06-29T02:05:09Z-
dc.date.available2016-06-29T02:05:09Z-
dc.date.created2016-04-12-
dc.date.created2016-04-12-
dc.date.created2016-04-12-
dc.date.created2016-04-12-
dc.date.issued2016-03-
dc.identifier.citationIEEE DESIGN & TEST OF COMPUTERS, v.33, no.2, pp.17 - 29-
dc.identifier.issn2168-2356-
dc.identifier.urihttp://hdl.handle.net/10203/208476-
dc.description.abstractNoise coupling through the substrate or silicon interposer among adjacent TSVs has a significant impact on the signal integrity of the TSVs. Since resistance and capacitance are dependent on temperature, more accurate electrical models for TSVs should incorporate the temperature dependency of the material. This paper presents high-frequency temperature-dependent RLGC models for two neighboring TSVs and for two neighboring TSV channels. After validating the models against data measured from a fabricated test vehicle, the paper investigates the impact of temperature on noise coupling between TSVs and TSV channels.-
dc.languageEnglish-
dc.publisherIEEE COMPUTER SOC-
dc.titleHigh-Frequency Temperature-Dependent Through-Silicon-Via (TSV) Model and High-Speed Channel Performance for 3-D ICs-
dc.typeArticle-
dc.identifier.wosid000371975100004-
dc.identifier.scopusid2-s2.0-84963966403-
dc.type.rimsART-
dc.citation.volume33-
dc.citation.issue2-
dc.citation.beginningpage17-
dc.citation.endingpage29-
dc.citation.publicationnameIEEE DESIGN & TEST OF COMPUTERS-
dc.identifier.doi10.1109/MDAT.2015.2455336-
dc.contributor.localauthorKim, Joungho-
dc.contributor.nonIdAuthorCho, Jong-Hyun-
dc.description.isOpenAccessN-
dc.type.journalArticleArticle-
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