A 27 mW Reconfigurable Marker-Less Logarithmic Camera Pose Estimation Engine for Mobile Augmented Reality Processor

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dc.contributor.authorHong, Injoonko
dc.contributor.authorKim, Gyeonghoonko
dc.contributor.authorKim, Youchangko
dc.contributor.authorKim, Donghyunko
dc.contributor.authorNam, Byeong-Gyuko
dc.contributor.authorYoo, Hoi-Junko
dc.date.accessioned2016-05-16T08:55:22Z-
dc.date.available2016-05-16T08:55:22Z-
dc.date.created2015-11-18-
dc.date.created2015-11-18-
dc.date.issued2015-11-
dc.identifier.citationIEEE JOURNAL OF SOLID-STATE CIRCUITS, v.50, no.11, pp.2513 - 2523-
dc.identifier.issn0018-9200-
dc.identifier.urihttp://hdl.handle.net/10203/207518-
dc.description.abstractA marker-less camera pose estimation engine (CPEE) with reconfigurable logarithmic SIMD processor is proposed for the view angle estimation used in mobile augmented reality (AR) applications. Compared to previous marker-based approach, marker-less camera pose estimation can overlay virtual images directly on natural world without the help of markers. However, they require 150x larger computing costs and large power consuming floating-point operations where such requirement severely restricts real-time operations and low-power implementations in mobile platform, respectively. To overcome the gap in computational costs between marker-based and marker-less method, speculative execution (SE) and reconfigurable data-arrangement layer (RDL) are proposed to reduce computing time by 17% and 27%, respectively. For low-power implementation of floating-point units, logarithmic processing element (LPE) is designed to reduce overall power consumption by 18%. The proposed marker-less CPEE is fabricated in 65 nm Logic CMOS technology, and successfully realizes real-time marker-less camera pose estimation with only 27 mW power consumption.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectGRAPHICS-
dc.subjectFEATURES-
dc.titleA 27 mW Reconfigurable Marker-Less Logarithmic Camera Pose Estimation Engine for Mobile Augmented Reality Processor-
dc.typeArticle-
dc.identifier.wosid000364458200005-
dc.identifier.scopusid2-s2.0-84947022911-
dc.type.rimsART-
dc.citation.volume50-
dc.citation.issue11-
dc.citation.beginningpage2513-
dc.citation.endingpage2523-
dc.citation.publicationnameIEEE JOURNAL OF SOLID-STATE CIRCUITS-
dc.identifier.doi10.1109/JSSC.2015.2463074-
dc.contributor.localauthorYoo, Hoi-Jun-
dc.contributor.nonIdAuthorKim, Donghyun-
dc.contributor.nonIdAuthorNam, Byeong-Gyu-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorAugmented reality-
dc.subject.keywordAuthorbundle adjustment-
dc.subject.keywordAuthorfeature matching-
dc.subject.keywordAuthorinter-frame similarity-
dc.subject.keywordAuthorlogarithmic processing element-
dc.subject.keywordAuthormarker-less camera pose estimation-
dc.subject.keywordAuthorreconfigurable matrix accelerator-
dc.subject.keywordPlusGRAPHICS-
dc.subject.keywordPlusFEATURES-
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