Drain current thermal noise modeling for deep submicron n- and p-channel MOSFETs

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dc.contributor.authorHan K.ko
dc.contributor.authorLee, Kwyroko
dc.contributor.authorShin H.ko
dc.date.accessioned2010-12-03T07:16:27Z-
dc.date.available2010-12-03T07:16:27Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2004-12-
dc.identifier.citationSOLID-STATE ELECTRONICS, v.48, no.12, pp.2255 - 2262-
dc.identifier.issn0038-1101-
dc.identifier.urihttp://hdl.handle.net/10203/20692-
dc.description.abstractThe drain current thermal noise has been measured and modeled for the short-channel devices fabricated with a standard 0.18 mum CMOS technology. We have derived a physics-based drain current thermal noise model for short-channel MOSFETs, which takes into account the velocity saturation effect and the carrier heating effect in gradual channel region. As a result, it is found that the well-known Q(inv)/L-2-formula, previously derived for long-channel, remains valid for even short-channel. The model excellently explained the carefully measured drain thermal noise for the entire V-GS and V-DS bias regions, not only in the n-channel, but also in the p-channel MOSFETs. Large excess noise, which was reported earlier in some other groups, was not observed in both the n-channel and the p-channel devices. (C) 2004 Elsevier Ltd. All rights reserved.-
dc.description.sponsorshipThis work was supported by the National Program for Tera-level Nano Devices through the Ministry of Science and Technology and by MICROS center through the Korea Science and Engineering Foundation.en
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD-
dc.subjectPARAMETER-EXTRACTION-
dc.subjectSIMULATION-
dc.titleDrain current thermal noise modeling for deep submicron n- and p-channel MOSFETs-
dc.typeArticle-
dc.identifier.wosid000224520600021-
dc.identifier.scopusid2-s2.0-4544255194-
dc.type.rimsART-
dc.citation.volume48-
dc.citation.issue12-
dc.citation.beginningpage2255-
dc.citation.endingpage2262-
dc.citation.publicationnameSOLID-STATE ELECTRONICS-
dc.identifier.doi10.1016/j.sse.2004.05.081-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorLee, Kwyro-
dc.contributor.nonIdAuthorHan K.-
dc.contributor.nonIdAuthorShin H.-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorthermal noise-
dc.subject.keywordAuthorMOSFET-
dc.subject.keywordAuthorRF CMOS-
dc.subject.keywordAuthorvelocity saturation effect-
dc.subject.keywordAuthorcarrier heating-
dc.subject.keywordAuthorinversion charge-
dc.subject.keywordAuthorchannel length-
dc.subject.keywordAuthormodulation-
dc.subject.keywordPlusPARAMETER-EXTRACTION-
dc.subject.keywordPlusSIMULATION-
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