DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kwon, Soon Won | ko |
dc.contributor.author | Lee, Joon Yeong | ko |
dc.contributor.author | Lee, Jinhee | ko |
dc.contributor.author | Han, Kwangseok | ko |
dc.contributor.author | Kim, Taeho | ko |
dc.contributor.author | Lee, Sangeun | ko |
dc.contributor.author | Lee, Jeong Sup | ko |
dc.contributor.author | Yoon, Taehun | ko |
dc.contributor.author | Won, Hyosup | ko |
dc.contributor.author | Park, Jinho | ko |
dc.contributor.author | Bae, Hyeon-Min | ko |
dc.date.accessioned | 2016-04-22T07:48:24Z | - |
dc.date.available | 2016-04-22T07:48:24Z | - |
dc.date.created | 2015-11-20 | - |
dc.date.created | 2015-11-20 | - |
dc.date.created | 2015-11-20 | - |
dc.date.issued | 2015-12 | - |
dc.identifier.citation | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.62, no.12, pp.2817 - 2828 | - |
dc.identifier.issn | 1549-8328 | - |
dc.identifier.uri | http://hdl.handle.net/10203/205720 | - |
dc.description.abstract | An automatic loop gain control algorithm (ALGC) for a bang-bang (BB) clock and data recovery (CDR) is proposed. The proposed algorithm finds the optimum loop gain using the autocorrelation of a BBPD output signal for minimum MSE performance. Mathematical proof of the algorithm is presented for both rotator-based and VCO-based CDRs with finite loop delay. A 25 Gb/s transceiver IC is fabricated using a 40 nm CMOS process to validate the performance of the algorithm. The power consumptions of TX and RX are 37.8 mW and 46.8 mW, respectively and the synthesized area implementing a digital loop filter together with the proposed ALGC occupies 140 mu m x 170 mu m. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.subject | ADAPTIVE DELTA-MODULATION | - |
dc.title | An Automatic Loop Gain Control Algorithm for Bang-Bang CDRs | - |
dc.type | Article | - |
dc.identifier.wosid | 000366836800004 | - |
dc.identifier.scopusid | 2-s2.0-84959864336 | - |
dc.type.rims | ART | - |
dc.citation.volume | 62 | - |
dc.citation.issue | 12 | - |
dc.citation.beginningpage | 2817 | - |
dc.citation.endingpage | 2828 | - |
dc.citation.publicationname | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | - |
dc.identifier.doi | 10.1109/TCSI.2015.2495725 | - |
dc.contributor.localauthor | Bae, Hyeon-Min | - |
dc.contributor.nonIdAuthor | Lee, Jinhee | - |
dc.contributor.nonIdAuthor | Han, Kwangseok | - |
dc.contributor.nonIdAuthor | Kim, Taeho | - |
dc.contributor.nonIdAuthor | Lee, Sangeun | - |
dc.contributor.nonIdAuthor | Lee, Jeong Sup | - |
dc.contributor.nonIdAuthor | Park, Jinho | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Bang-bang PLL | - |
dc.subject.keywordAuthor | CDR | - |
dc.subject.keywordAuthor | kalman gain | - |
dc.subject.keywordAuthor | serial links | - |
dc.subject.keywordAuthor | serial-in/serial-out | - |
dc.subject.keywordPlus | ADAPTIVE DELTA-MODULATION | - |
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