A 1.93 TOPS/W Scalable Deep Learning/Inference Processor with Tetra-parallel MIMD Architecture for Big Data Applications

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Publisher
IEEE
Issue Date
2015-02-23
Language
English
Citation

IEEE International Solid- State Circuits Conference, pp.80 - 81

URI
http://hdl.handle.net/10203/204565
Appears in Collection
EE-Conference Papers(학술회의논문)
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