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Results 1-10 of 26 (Search time: 0.006 seconds).
| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| Programming and Erasing Characteristics of P-channel Nano-crystal Memory Hyung-Cheol Shin, Semicon Korea Technical Symposium 2000, pp.5 - 10, 2000 | |
| A Nonvolatile Memory Using Nanocrystals Formed by Wet Etching Hyung-Cheol Shin, ICSMM 2000, pp.124 - 125, 2000 | |
| MOS Memory Using Si Nanocrystals Formed by Wet Etching of Poly-Silicon Along Grain Boundaries Hyung-Cheol Shin, 2000 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp.221 - 224, 2000 | |
| Two Band Tunneling Currents in Dual-Gate CMOSFET with Ultrathin Gate Oxide Hyung-Cheol Shin, ICSMM 2000, pp.108 - 109, 2000 | |
| Physical RF modeling of Junction Varactors Hyung-Cheol Shin, SSDM 2002, pp.418 - 419, 2002 | |
| 50 nm MOSFET with Floating Polysilicon Spacer Hyung-Cheol Shin, IEEE Silicon Nanoelectronics Workshop, pp.54 - 55, 2001 | |
| A New Curvature-Compensated CMOS Bandgap Reference with Low Power Consumption Hyung-Cheol Shin, ITC-CSCC 2000, pp.612 - 614, 2000 | |
| 50 nm MOSFET with High-k Dielectric Sidewall Hyung-Cheol Shin, IEEE Silicon Nanoelectronics Workshop, pp.70 - 71, 2001 | |
| Accurate Four-Terminal RF MOSFET Model Accounting for the Short-Channel Effect in the Source-to-Drain Capacitance Hyung-Cheol Shin, SISPAD 2003, 2003 | |
| A 2.4-GHz Fully Integrated CMOS Quadrature VCO Hyung-Cheol Shin, Asia Pacific-System on a Chip 2002, pp.207 - 210, 2002 |