| 1 | New staggered poly-Si TFT with a self-aligned offset structure Chul-Hi Han, IDRC, pp.29 - 30, 1998 |
| 2 | Two Layer Gate Insulator with ECR Thermal Oxide/LPCVD Oxide for Poly-Si TFT Chul-Hi Han, Japan Society of Applied Physics and Related Societies, pp.633 -, 1993 |
| 3 | Characteristics of Poly-Si TFT's with various active layer thicknesses formed using ECR oxidation and wet etching Kim, Choong Ki; Chul-Hi Han, International workshop on Active Matrix Liquid Crystal Displays, 1994 |
| 4 | Low Temperature Polysilicon TFT's with ECR plasma thermal oxide using Si2H6 source gas for active polysilicon film Kim, Choong Ki; Chul-Hi Han, 2nd International Semiconductor Device Research Symposium, 1994 |
| 5 | A Low-Power Poly-Si TFT-LCD with Integrated 8-bit Digital Data DRivers Chul-Hi Han, IDRC, 1998 |
| 6 | Suppression of Leakage Current in Polysilicon NMOS Thin Film Transistors Using NH3 Annealing Kim, Choong Ki; Chul-Hi Han, International Conference on Solid State Device and Materials, 1994 |
| 7 | Gate-Induced Drain Leakage in MOSFETs Chul-Hi Han, International Symposium on Physics of Semiconductors and Applications, 1990 |
| 8 | Application of electron cyclotron resonance plasma thermal oxidation to bottom gate polysilicon thin film transistors Kim, Choong Ki; Chul-Hi Han, International Conference on Solid State Devices and Materials, pp.653 - 655, 1995 |
| 9 | High-Performace EEPROMS Using N-and P-channel Poly-Si Thin Film Transistors with ECR N2O-Plasma Oxide, The International Conference on Solid state Devices and Materials Chul-Hi Han, SSDM, 1998 |
| 10 | A new high resolution single-crystal-silicon AMLCD technology Chul-Hi Han, 1996 Society for Information Display Int'l Symposium, pp.161 - 164, 1996 |
