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Results 41-50 of 60 (Search time: 0.004 seconds).
| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| A self-assembled silicon quantum dot transistor operation at room temperature Hyung-Cheol Shin, Sound Quality Symposium Conference(SQS), 1998 | |
| P-channel Nano Crystal Memory Hyung-Cheol Shin, 2000 China-Korea Joint Symposium on Semiconductor Physics and Device Application, pp.19 - 19, 2000 | |
| Device Characteristics of 25 nm MOSFET with Floating Side Gates Hyung-Cheol Shin, ICSMM 2000, pp.118 - 119, 2000 | |
| DC and AC Characteristics of 10 nm T-Gate MOSFETs with Source/Drain-to-gate Non-Overlapped Structure Hyung-Cheol Shin, Silicon Nanoelectronics Workshop 2003, pp.24 - 25, 2003 | |
| Sub 4-nm Polyoxide Using ECR(Electron Cyclotron Resonance) N2O Plasma Oxidation Hyung-Cheol Shin, 2000 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp.25 - 30, 2000 | |
| Ultra thin oxide grown on polysilicon by ECR(Electron Cyclotron Resonance) N2O Plasma Hyung-Cheol Shin, 5th International Symposium on Plasma Process-Induced Damage 2000, no.2000, pp.133 - 136, 2000 | |
| A Simple Wide-Band MIM Capacitor Model for RF Applications and the Effect of Substrate Grounded Shields Hyung-Cheol Shin, 2003 International Conference on Solid State Devices and Materials (SSDM 2003), 2003 | |
| A 5-GHz Band I/Q Generator using a Self-Calibration Technique Beom-Sup Kim; Hyung-Cheol Shin, European Solid-State Circuit Conference, pp.807 - 810, 2002 | |
| A Tri-Gate MOSFET with Gate-to-Source/Drain Non-overlapped Structure for 5 nm Regime Hyung-Cheol Shin, Silicon Nanoelectronics Workshop 2003, pp.32 - 33, 2003 | |
| Physical Modeling of Substrate Resistance in RF MOSFETs Hyung-Cheol Shin, Workshop on Compact Modeling at the 5th International Conference on Modeling and Simulation of Microsystems, pp.335 - 338, 2003 |
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Type
- 60 Conference
Date issued
- 26 2000 - 2003
- 34 1991 - 1999