Search
Results 11-20 of 34 (Search time: 0.004 seconds).
| NO | Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date) |
|---|---|
| Recessed Channel(RC) SOI NMOSFET's with Self-Aligned Polysilicon Gate Formed on the RC Region Hyung-Cheol Shin, Proc. IEEE International SOI Conference, pp.122 - 123, 1996 | |
| A Simple Technique to Measure Generation Lifetime in Partially Depleted SOI MOSFETS Hyung-Cheol Shin, 5th International Conference on VLSI and CAD, pp.55 - 59, 1997 | |
| Process-Induced Charging Damage in PETEOS for Interlevel Dielectric Applications Hyung-Cheol Shin, International Symposium on Plasma Process-Induced Damage, pp.109 - 112, 1996 | |
| Comparison of the characteristics of tunneling oxide and tunneling ON for P-channel Nano-crystal Memory Hyung-Cheol Shin, The 6th International Conference on VLSI and Cad(ICVC'99), pp.233 - 236, 1999 | |
| Silicon MOS Memory with self-aligned Quantum Dot on Narow Channel Hyung-Cheol Shin, ICVC99, pp.187 - 189, 1999 | |
| Fabrication and Characterization of a Quantum Dot Flash Memory Hyung-Cheol Shin, 99 International Workshop on Advanced LSI's and Devices, pp.12 - 15, 1999 | |
| A New SOI Inverter using Active Body-Bias Hyung-Cheol Shin, ITC-CSCC, pp.1457 - 1459, 1998 | |
| Thickness and Other Defects on Oxide and Interface Reliability due to Plasma Processing Hyung-Cheol Shin, Proc. IEEE International Reliability Phys. Symp., pp.272 - 279, 1993 | |
| A self-assembled silicon quantum dot transistor operation at room temperature Hyung-Cheol Shin, 1998 ASIAN SCIENCE SEMINAR, 1998 | |
| TFSOI Complementary BiCMOS Technology for Low Power RF Mixed-Mode Applications Hyung-Cheol Shin, IEEE Custom Integrated Circuits Conference, pp.35 - 38, 1996 |