Browse "RIMS Conference Papers" by Title

Showing results 33 to 52 of 2826

33
A Study on Deposition of Laminar Pyrolytic Carbon Deposited in Tumbling Bed

Lee, Jai Young, 6th World Congress on High-tech Ceramics

34
A -242dB FOM and -75dBc-reference-spur ring-DCO-based all-digital PLL using a fast phase-error correction technique and a low-power optimal-threshold TDC

Seong, Taeho; Lee, Yongsun; Yoo, Seyeon; Choi, Jaehyouk, 65th IEEE International Solid-State Circuits Conference, ISSCC 2018, pp.396 - 398, Institute of Electrical and Electronics Engineers Inc., 2018-02-13

35
A -31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers

Yoon, Heein; Kim, Juyeop; Park, Suneui; Lim, Younghyun; Lee, Yongsun; Bang, Jooeun; Lim, Kyoohyun; et al, 65th IEEE International Solid-State Circuits Conference, ISSCC 2018, pp.366 - 368, Institute of Electrical and Electronics Engineers Inc., 2018-02-13

36
A 0.5V-VIN, 0.29ps-Transient-FOM, and Sub-2mV-Accuracy Adaptive-Sampling Digital LDO Using Single-VCO-Based Edge-Racing Time Quantizer

Lee, Jeonghyun; Bang, Jooeun; Lim, Younghyun; Choi, Jaehyouk, 33rd Symposium on VLSI Circuits, VLSI Circuits 2019, pp.C130 - C131, Institute of Electrical and Electronics Engineers Inc., 2019-06-12

37
A 1-V 5 GHz low phase noise LC-VCO using voltage-dividing and bias-level shifting technique

Song T.; Yoon E.researcher, 2004 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems: Digest of Papers, pp.87 - 90, 2004-09-08

38
A 1.2-V 8-mW 2.4-GHz CMOS RF receiver IC for low power WPAN

Kwon I.; Song S.; Ko J.researcher, 2006 IEEE Sarnoff Symposium, 2006-03-27

39
A 1.8-GHz Self-calibrated Phase-locked Loop with Precise I/Q Matching

Beom-Sup Kimresearcher, AP-ASIC 2000 Proceedings of the Second IEEE Asia Pacific Conference on, pp.81 - 84, 2000

40
A 13 bit 2.5 MHz Self-Calibrated Pipelined A/D Converter in 3um CMOS

Beom-Sup Kimresearcher, IEEE Symposium on VLSI CIrcuits, pp.33 - 34, 1990

41
A 13GHZ CMOS distributed oscillator using MEMS coupled transmission lines for low phase noise

Park E.-C.; Yoon E.researcher, Digest of Technical Papers - IEEE International Solid-State Circuits Conference: Visuals Supplement, v.47, pp.244 - 245, 2003-02-15

42
A 16b quadrature direct digital frequency synthesizer using interpolative angle rotation algorithm

Song Y.; Kim B.researcher, 2002 Symposium on VLSI Circuits Digest of Technical Papers, pp.146 - 147, 2002-06-13

43
A 185fsrms-integrated-jitter and -245dB FOM PVT-robust ring-VCO-based injection-locked clock multiplier with a continuous frequency-tracking loop using a replica-delay cell and a dual-edge phase detector

Choi, Seojin; Yoo, Seyeon; Choi, Jaehyouk, 63rd IEEE International Solid-State Circuits Conference, ISSCC 2016, pp.194 - 195, Institute of Electrical and Electronics Engineers Inc., 2016-02-15

44
A 1x1, 512x512 poly-Si TFT-LCD with Integrated 8-bit Parallel-Serial Digital Data Drivers

Chul-Hi Hanresearcher, IDMC 2000, pp.115 - 118, 2000

45
A 2.4-GHz CMOS LNA with harmonic cancellation and current reuse technique

Kwon I.; Gil J.; Lee K.; 신형철researcher, 제9회 반도체학술대회, pp.251 - 254, 제9회 반도체학술대회, 2002-02

46
A 2.4-GHz Fully Integrated CMOS Quadrature VCO

Hyung-Cheol Shinresearcher, Asia Pacific-System on a Chip 2002, pp.207 - 210, 2002

47
A 2.4-GHz Fully Integrated CMOS Quadrature VCO

신형철researcher, IDEC Conference 2002-Summer, pp.31 - 34, 2002

48
A 2.6GHz Low Phase-Noise VCO Monolithically Integrated with High Q MEMS Inductors

Euisik Yoonresearcher, European Solid-State Circuits Conference, pp.143 - 146, 2002

49
A 200 x 160 pixel CMOS fingerprint recognition SoC with adaptable column-parallel processors

Kim S.-J.; Lee K.-H.; Han S.-W.; Yoon E.researcher, 2005 IEEE International Solid-State Circuits Conference, ISSCC, v.48, pp.250 -, 2005-02-06

50
A 230MHz 8 Tap Programmable FIR Filter Using Redundant Binary Number System

Euisik Yoonresearcher, IEEE ISCAS, 1999

51
A 250MHz direct digital frequency synthesizer with ΣΔ noise shaping

Song Y.; Kim B.researcher, 2003 Digest of Technical Papers, 2003-02-09

52
A 250MHz Low Jitter Adaptive Bandwidth PLL

Beom-Sup Kimresearcher, IEEE International Solid-State Circuit Conferece, 1999

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