Browse "School of Electrical Engineering(전기및전자공학부)" byTypeConference

Showing results 375 to 394 of 20709

375
A CDMA-Based Infrastructure: Its Development, Architecture and Field Trial

Han, Youngnamresearcher; Han, K.C; Bahk, H.G, 7th World Telecomm. Forum, v.2, no.0, pp.0 - 0, 1995

376
A Floorplan-based Planning Methodology for Power and Clock Distribution in ASICs

Kyung, Chong-Minresearcher; Yim, J.S., 36th Design Automation Conference(DAC), pp.766 - 771, 1999-06

377
A fuzzy set theoretic approach to signal detection

Son, J.C.; Song, Iickhoresearcher; Kim, S., pp.150 - 153, IEEE, 1991-05

378
A Modularized Two-Stage Charge Equalization Converter for Series Connected Lithium-Ion Battery Strings

Kim, Chol-Ho; Park, Hong-Sun; Moon, Gun- Woo, 2008년 전력전자학술대회, pp.535 - 537, KIPE, 2008-07-01

379
A New External Force for Active Contour Model: Virtual Electric Field

Chung, Myung Jinresearcher; Park Hyun Keun, IASTED International Conference on Visualization, Imaging and Image Processing, pp.103 - 106, IASTED, 2002-09

380
A Novel Predictive Current Control of Induction Motor Using Resonant DC Link Inverter

Oh, In-Hwan; Moon, GunWooresearcher; Youn, Myung Joongresearcher, Industrial Electronics, Control, and Instrumentation, 1996., Proceedings of the 1996 IEEE IECON 22nd International Conference, pp.1106 - 1111, IEEE, 1996-08

381
A 'personalized' facial expression recognition with fuzzy similarity measure and novel feature selection method

Kim D.-J.; Bien, Zeung namresearcher, 2004 IEEE International Conference on Fuzzy Systems, v.1, pp.33 - 38, 2004-07-25

382
A -240dB-FoMjitter and -115dBc/Hz PN @ 100kHz, 7.7GHz Ring-DCO-Based Digital PLL Using P/I-Gain Co-Optimization and Sequence-Rearranged Optimally Spaced TDC for Flicker-Noise Reduction

Lee, Yongsun; Seong, Taeho; Lee, Jeonghyun; Hwanq, Chanwoong; Park, Hangi; Choi, Jaehyoukresearcher, 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020, pp.266 - 268, Institute of Electrical and Electronics Engineers Inc., 2020-02-19

383
A -242dB FOM and -75dBc-reference-spur ring-DCO-based all-digital PLL using a fast phase-error correction technique and a low-power optimal-threshold TDC

Seong, Taeho; Lee, Yongsun; Yoo, Seyeon; Choi, Jaehyoukresearcher, 65th IEEE International Solid-State Circuits Conference, ISSCC 2018, pp.396 - 398, Institute of Electrical and Electronics Engineers Inc., 2018-02-13

384
A -31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers

Yoon, Heein; Kim, Juyeop; Park, Suneui; Lim, Younghyun; Lee, Yongsun; Bang, Jooeun; Lim, Kyoohyun; et al, 65th IEEE International Solid-State Circuits Conference, ISSCC 2018, pp.366 - 368, Institute of Electrical and Electronics Engineers Inc., 2018-02-13

385
A -58dBc-Worst-Fractional-Spur and -234dB-FoMjitter, 5.5GHz Ring-DCO-Based Fractional-N DPLL Using a Time-Invariant-Probability Modulator, Generating a Nonlinearity-Robust DTC-Control Word

Seong, Taeho; Lee, Yongsun; Hwang, Chanwoong; Lee, Jeonghyun; Park, Hangi; Lee, Kyuho Jason; Choi, Jaehyoukresearcher, 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020, pp.270 - 272, Institute of Electrical and Electronics Engineers Inc., 2020-02-19

386
A 0.0046mm2 6.7μW Three-Stage Amplifier Capable of Driving 0.5-to-1.9nF Capacitive Load with >0.68MHz GBW without Compensation Zero

Shin, Hongseok; Kim, Jinuk; Jang, Doojin; Cho, Donghee; Jung, Yoontae; Cho, Hyungjoo; Lee, Unbong; et al, 2020 IEEE Symposium on VLSI Circuits, IEEE, 2020-06

387
A 0.014mm<sup>2</sup> 9b switched-current DAC for AMOLED mobile display drivers

Kim, Hyun Sikresearcher; Jeon, Jin Yong; Lee, Sung Woo; Yang, Jun Hyeok; Ryu, Seung Tak; Cho, Gyu Hyeong, 2011 IEEE International Solid- State Circuits Conference - (ISSCC), IEEE, 2011-02

388
A 0.014mm2 9b switched-current DAC for AMOLED mobile display drivers

Kim, H.-S.; Jeon, J.-Y.; Lee, S.-W.; Yang, J.-H.; Ryu, Seung-Takresearcher; Cho, Gyu-Hyeongresearcher, 2011 IEEE International Solid-State Circuits Conference, ISSCC 2011, pp.316 - 317, IEEE, 2011-02-20

389
A 0.18 um CMOS UWB RF Transmitter for DS-CDMA Applications

홍성철researcher; 구본현; 이희동; 이경애; 백지선; 박봉혁, 한국반도체학술대회, 2006

390
A 0.18 ㎛ Radiation Hardening Shift Register using Guard Gate technique to Reduce SEUs

Noh, Youngtak; Lee, Hee Chul, ISOCC(International SoC Design Conference) 2014, IEIE, 2014-11-04

391
A 0.18um CMOS 10Gb/s 1:4 DEMUX using replica-bias circuits for optical receiver

Hong, J.-P.; Ha, K.-S.; Kim, Lee-Supresearcher, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, pp.5708 - 5711, 2006-05-21

392
A 0.18um Si-CMOS limiting amplifier for 10-Gb/s optical iInterconnection

Kang, SK; Lee, TW; Park, HyoHoonresearcher, OECC, v.0, no.0, pp.654 - 655, OECC, 2005-07-04

393
A 0.18μm CMOS 10Gb/s 1:4 DEMUX Using Replica-Bias Circuits for Optical Receiver

Hong, JP; Ha, KS; Kim, Lee-Supresearcher, ISCAS 2006, pp.5708 - 5711, IEEE, 2006-05-21

394
A 0.22–0.89 mW Low-Power and Highly-Secure Always-on Face Recognition Processor with Adversarial Attack Prevention

Kim, Youngwoo; Yoo, Hoi-Junresearcher; Han, Donghyeon; Kim, Changhyeon, 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Institute of Electrical and Electronics Engineers Inc., 2020-10-21

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