Browse "School of Electrical Engineering(전기및전자공학부)" by Subject NM CMOS
Showing results 1 to 23 of 23
| A 0.22 ps(rms) Integrated Noise 15 MHz Bandwidth Fourth-Order Delta Sigma Time-to-Digital Converter Using Time-Domain Error-Feedback Filter Yu, Wonsik; Kim, KwangSeok; Cho, Seong-Hwan, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.50, no.5, pp.1251 - 1262, 2015-05 |
| A 0.55 V 1.1 mW Artificial Intelligence Processor With On-Chip PVT Compensation for Autonomous Mobile Robots Kim, Youchang; Shin, Dongjoo; Lee, Jinsu; Lee, Yongsu; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.65, no.2, pp.567 - 580, 2018-02 |
| A 0.6 V 12 b 10 MS/s Low-Noise Asynchronous SAR-Assisted Time-Interleaved SAR (SATI- SAR) ADC Kim, Wan; Hong, Hyeok-Ki; Roh, Yi-Ju; Kang, Hyun-Wook; Hwang, Sun-Il; Jo, Dong Shin; Chang, Dong-Jin; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.51, no.8, pp.1826 - 1839, 2016-08 |
| A 18.5 nW 12-bit 1-kS/s Reset-Energy Saving SAR ADC for Bio-Signal Acquisition in 0.18-mu m CMOS Seo, Min-Jae; Jin, Dong-Hwan; Kim, Ye-Dam; Hwang, Sun-Il; Kim, Jong-Pal; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.65, no.11, pp.3617 - 3627, 2018-11 |
| A 21-Gbit/s 1.63-pJ/bit Adaptive CTLE and One-Tap DFE With Single Loop Spectrum Balancing Method Kim, Yong-Hun; Kim, Young-Ju; Lee, Taeho; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.24, no.2, pp.789 - 793, 2016-02 |
| A 28-nm 10-b 2.2-GS/s 18.2-mW Relative-Prime Time-Interleaved Sub-Ranging SAR ADC With On-Chip Background Skew Calibration Chang, Dong-Jin; Choi, Michael; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.56, no.9, pp.2691 - 2700, 2021-09 |
| A 4 x 10-Gb/s Referenceless-and-Masterless Phase Rotator-Based Parallel Transceiver in 90-nm CMOS Lee, Joon Yeong; Yang, Jaehyeok; Yoon, Jong Hyeok; Kwon, Soon Won; Won, Hyosup; Han, Jinho; Bae, Hyeon-Min, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.24, no.6, pp.2310 - 2320, 2016-06 |
| A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling Jang, Il Hoon; Seo, Min-Jae; Cho, Sang-Hyun; Lee, Jae-Keun; Baek, Seung-Yeob; Kwon, Sunwoo; Choi, Michael; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.4, pp.1139 - 1148, 2018-04 |
| A 40-nm CMOS 12b 120-MS/s Nonbinary SAR-Assisted SAR ADC With Double Clock-Rate Coarse Decision Roh, Yi-Ju; Chang, Dong-Jin; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.67, no.12, pp.2833 - 2837, 2020-12 |
| A 5-GHz WLAN RF CMOS Power Amplifier With a Parallel-Cascoded Configuration and an Active Feedback Linearizer Kang, Seung Hoon; Baek, Donghyun; Hong, Songcheol, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.65, no.9, pp.3230 - 3244, 2017-09 |
| A 60-GHz Variable-Gain Phase Shifter With Particular-Sized Digital-RF Cells Sung, Eun-Taek; So, Cheol; Hong, Songcheol, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.70, no.2, pp.1302 - 1313, 2022-02 |
| A 79-GHz Adaptive-Gain and Low-Noise UWB Radar Receiver Front-End in 65-nm CMOS Jang, Jingyu; Oh, Juntaek; Kim, Choul-Young; Hong, Songcheol, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.64, no.3, pp.859 - 867, 2016-03 |
| A Forwarded Clock Receiver Based on Injection-Locked Oscillator With AC-Coupled Clock Multiplication Unit in 0.13 mu m CMOS Kim, Young Ju; Chung, Sang-Hye; Kim, Lee-Sup, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.23, no.5, pp.988 - 992, 2015-05 |
A Fully Integrated Compact Outphasing CMOS Power Amplifier Using a Parallel-Combining Transformer with a Tuning Inductor Method Choi, Se-Eun; Ahn, Hyunjin; Hur, Joonhoi; Kim, Kwan-Woo; Nam, Ilku; Choi, Jaehyouk; Lee, Ockgoo, ELECTRONICS, v.9, no.2, 2020-02 |
| A Fully Integrated RF CMOS Front-End IC for Connectivity Applications Joo, Taehwan; Lee, Dong-Ho; Hong, Songcheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.63, no.11, pp.1024 - 1028, 2016-11 |
| A Low Power LNA-Phase Shifter With Vector Sum Method for 60 GHz Beamforming Receiver Song, In Sang; Lee, Joong Geun; Yoon, Giwan; Park, Chul Soon, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.25, no.9, pp.612 - 614, 2015-09 |
| A Second-Order Delta Sigma Time-to-Digital Converter Using Highly Digital Time-Domain Arithmetic Circuits Kim, Dongin; Kim, Kwangseok; Yu, Wonsik; Cho, Seonghwan, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.66, no.10, pp.1643 - 1647, 2019-10 |
| A Time-Interleaved 12-b 270-MS/s SAR ADC With Virtual-Timing-Reference Timing-Skew Calibration Scheme Kang, Hyun-Wook; Hong, Hyeok-Ki; Kim, Wan; Ryu, Seung-Tak, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.53, no.9, pp.2584 - 2594, 2018-09 |
| A W-Band 4-GHz Bandwidth Phase-Modulated Pulse Compression Radar Transmitter in 65-nm CMOS Oh, Juntaek; Jang, Jingyu; Kim, Choul-Young; Hong, Songcheol, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.63, no.8, pp.2609 - 2618, 2015-08 |
| A WLAN RF CMOS PA With Large-Signal MGTR Method Joo, Tae-Hwan; Koo, Bon-Hoon; Hong, Song-Cheol, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, v.61, pp.1272 - 1279, 2013-03 |
| Design and Analysis of 239 GHz CMOS Push-Push Transformer-Based VCO With High Efficiency and Wide Tuning Range Koo, Hyunji; Kim, Choul-Young; Hong, Song-Cheol, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.62, no.7, pp.1883 - 1893, 2015-07 |
| Normalized-Full-Scale-Referencing Digital-Domain Linearity Calibration for SAR ADC Chang, Dong-Jin; Kim, Wan; Seo, Min-Jae; Hong, Hyeok-Ki; Ryu, Seung-Tak, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.64, no.2, pp.322 - 332, 2017-02 |
| Wideband 120-GHz CMOS I/Q Transmitter With Suppressed IMRR and LOFT for Wireless Short-Range High-Speed 6G IoT Applications Kim, Seung Hun; Jang, Tae Hwan; Kang, Dong Min; Jung, Kyung Pil; Park, Chul Soon, IEEE INTERNET OF THINGS JOURNAL, v.10, no.13, pp.11739 - 11748, 2023-07 |
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