Showing results 1 to 6 of 6
Accelerating verification with reusable testbench Son, J; Choi, HaeWook; Park, Sin Chong, IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, v.E89D, pp.853 - 856, 2006-02 |
Fast Verification of Guide-Patterns for Directed Self-Assembly Lithography Shim, Seongbo; Shin, Youngsoo, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.36, no.9, pp.1522 - 1531, 2017-09 |
Instruction based synthesizable testbench architecture Choi, HS; Choi, HaeWook; Park, Sin Chong, IEICE TRANSACTIONS ON ELECTRONICS, v.E89C, pp.653 - 657, 2006-05 |
Model checking using interface abstraction = 인터페이스 추상화를 이용한 모델 체킹link Jung, Hee-Jae; 정희재; et al, 한국과학기술원, 2003 |
Synthesis and verification of state machine description using automatic test vector generation = 테스트 벡터 자동 생성을 이용한 스테이트 머신 기술의 합성 및 검증link Ahn, Ki-Yong; 안기용; et al, 한국과학기술원, 2002 |
THEMIS: A Mutually Verifiable Billing System for the Cloud Computing Environment Park, Ki-Woong; Han, Jaesun; Chung, JaeWoong; Park, Kyu Ho, IEEE TRANSACTIONS ON SERVICES COMPUTING, v.6, no.3, pp.300 - 313, 2013-07 |
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