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Showing results 1 to 5 of 5

1
A 0.22 ps(rms) Integrated Noise 15 MHz Bandwidth Fourth-Order Delta Sigma Time-to-Digital Converter Using Time-Domain Error-Feedback Filter

Yu, Wonsik; Kim, KwangSeok; Cho, Seong-Hwan, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.50, no.5, pp.1251 - 1262, 2015-05

2
A 148fS(rms) Integrated Noise 4 MHz Bandwidth Second-Order Delta Sigma Time-to-Digital Converter With Gated Switched-Ring Oscillator

Yu, Wonsik; Kim, KwangSeok; Cho, SeongHwan, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.61, no.8, pp.2281 - 2289, 2014-08

3
A Hybrid PLL Using Low-Power GRO-TDC for Reduced In-Band Phase Noise

Kim, Dongin; Cho, Seonghwan, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.66, no.2, pp.232 - 236, 2019-02

4
A Time-Domain High-Order MASH Delta Sigma ADC Using Voltage-Controlled Gated-Ring Oscillator

Yu, Won-Sik; Kim, Jae-Wook; Kim, Kwang-Seok; Cho, Seong-Hwan, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.60, no.4, pp.856 - 866, 2013-04

5
An On-Chip Thermal Monitoring System With a Temperature Sensing Area of 52 mu m(2) in 180-nm CMOS

Jung, Dong-Kyun; Seo, Jin-O; Cho, Seonghwan, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.66, no.10, pp.1638 - 1642, 2019-10

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