Browse "School of Electrical Engineering(전기및전자공학부)" by Subject Germanium

Showing results 1 to 11 of 11

1
H-2 High Pressure Annealed Y-Doped ZrO2 Gate Dielectric With an EOT of 0.57 nm for Ge MOSFETs

Lee, Tae In; Manh-Cuong Nguyen; Ahn, Hyunjun; 김민주; Shin, Eui Joong; Hwang, Wan Sik; Yu, Hyun-Young; et al, IEEE ELECTRON DEVICE LETTERS, v.40, no.9, pp.1350 - 1353, 2019-09

2
Lowering the effective work function via oxygen vacancy formation on the GeO2/Ge interface

Lee, Tae In; Seo, Yujin; Moon, Jung Min; Ahn, Hyunjun; Yu, Hyun-Young; Hwang, Wan Sik; Cho, Byung Jin, SOLID-STATE ELECTRONICS, v.130, pp.57 - 62, 2017-04

3
p-Type Nanowire Schottky Barrier MOSFETs: Comparative Study of Ge- and Si-Channel Devices

Choi, Won Chul; Lee, Jaehyun; Shin, Mincheol, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.61, no.1, pp.37 - 43, 2014-01

4
Research on improvement of electrical properties of Ge pMOS devices using Vacuum Annealing and Ultrathin Hf layer with sub-1nm EOT = 진공열처리와 Hf박막을 이용한 1nm이하 EOT를 가지는 Ge pMOS구조에서의 전기적 특성 개선에 관한 연구link

Chung, Won-Il; 정원일; et al, 한국과학기술원, 2014

5
Simulation Study of Germanium p-Type Nanowire Schottky Barrier MOSFETs

Lee, Jaehyun; Shin, Mincheol, IEEE ELECTRON DEVICE LETTERS, v.34, no.3, pp.342 - 344, 2013-03

6
The Impact of an Ultrathin Y2O3 Layer on GeO2 Passivation in Ge MOS Gate Stacks

Seo, Yujin; Lee, Tae In; Yoon, Chang Mo; Park, Bo Eun; Hwang, Wan Sik; Kim, Hyungjun; Yu, Hyun-Yong; et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, v.64, no.8, pp.3303 - 33007, 2017-08

7
The Mechanism of Schottky Barrier Modulation of Tantalum Nitride/Ge Contacts

Seo, Yu Jin; Lee, Sukwon; Baek, Seung-heon Chris; Hwang, Wan Sik; Yu, Hyun-Yong; Lee, Seok-Hee; Cho, Byung-Jin, IEEE ELECTRON DEVICE LETTERS, v.36, no.10, pp.997 - 1000, 2015-10

8
Ultrathin EOT (0.67 nm) High-k Dielectric on Ge MOSFET Using Y Doped ZrO2 With Record-Low Leakage Current

Lee, Tae In; Ahn, Hyunjun; 김민주; Shin, Eui Joong; Lee, Seung Hwan; Shin, Sung Won; Hwang, Wan Sik; et al, IEEE ELECTRON DEVICE LETTERS, v.40, no.4, pp.502 - 505, 2019-04

9
서로 다른 High-k 박막에 대해서 TMA 전처리에 따른 Ge/High-k 게이트 구조에서의 계면의 특성과 히스테리시스에 대한 연구 = Study on interface quality and hysteresis of Ge/High-k gate stack with TMA pretreatment for different High-k dielectricslink

이재진; Lee, Jae-Jin; et al, 한국과학기술원, 2012

10
저전력 소자 개발을 위한 대칭 게이트 배열의 저마늄 수직 방향 터널 전계 효과 트랜지스터 연구 = Study on germanium vertical band-to-band tunnel-field effect transistor with symmetric gate arrangement for low power device applicationslink

정우진; Jeong, Woo-Jin; et al, 한국과학기술원, 2014

11
질화물 박막 증착 방법을 이용한 금속/게르마늄 접합의 쇼트키 장벽 높이 조절 = Schottky barrier height modulation of metal/germanium junction by using nitride thin films depositionlink

이석원; Lee, Suk-Won; et al, 한국과학기술원, 2014

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