Browse "School of Electrical Engineering(전기및전자공학부)" by Author Yang, Woo-Seung
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| An Implementation of Pipelined Rijndael with SystemC and Co-emulation with iPROVE Kyung, Chong-Min; Lee, Jae-Gon; Yang, Woo-Seung; Ki, Ando, SNUG(Synopsys Users Group) Korea 2003, 2003-05 |
| New HDL for synchronus digital system and simulator implementation = 동기식 디지털 시스템을 위한 새로운 HDL의 제안 및 시뮬레이터 구현link Yang, Woo-Seung; 양우승; et al, 한국과학기술원, 1998 |
| Signal Scheduling Driven Circuit Partitioning for Multiple FPGAs with Time-multiplexed Interconnection Kyung, Chong-Min; Kwon, Young-Su; Yang, Woo-Seung, IFIP International Conference on Very Large Scale Integration(IFIP VLSI-SOC 2003), pp.123 - 128, 2003-12 |
| SoC design methodology based on c model refinement = C 모델 개선을 통한 시스템 칩 설계 방법link Yang, Woo-Seung; 양우승; et al, 한국과학기술원, 2004 |
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