Showing results 1 to 4 of 4
An effective loop inductance model for general non-orthogonal interconnect with random capacitive coupling Sim, S.-P.; Chao, C.; Krishnan, S.; Petranovic, D.M.; Arora, N.D.; Lee, Kwyro; Yang, C.Y., 2002 IEEE International Devices Meeting (IEDM), pp.315 - 318, 2002-12-08 |
Investigation of the mechanism of floating node assisted CMOS latch-up Sim, S.-P.; Guo, P.; Kordesch, A.; Chen, W.F.; Liu, C.-M.; Yang, C.Y.; Lee, Kwyro, 2001 International Conference on Modeling and Simulation of Microsystems - MSM 2001, pp.526 - 529, 2001-03-19 |
Resistance matrix in crosstalk modeling for multiconductor systems Yu, S.; Petranovic, D.M.; Krishnan, S.; Lee, Kwyro; Yang, C.Y., Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004, pp.122 - 125, IEEE, 2004-03-22 |
Unified model for on-chip interconnects Yu, S.; Sim, S.-P.; Krishnan, S.; Petranovic, D.M.; Lee, Kwyro; Yang, C.Y., 2004 7th International Conference on Solid-State and Integrated Circuits Technology, v.2, pp.1026 - 1031, 2004-10-18 |
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