Browse "School of Electrical Engineering(전기및전자공학부)" by Author Shin, MC
Showing results 1 to 8 of 8
| A Programmable Turbo Decoder for Multiple Third-Generation Wireless Standards Park, In-Cheol; Shin, MC, International Solid-State Circuits Conference, ISCC, 2003-02-13 |
| A Two-step 5b Logarithmic ADC with Minimum Step-size of 0.1% Full-scale for MLC Phase-Change Memory Readout Kwon, JW; Jin, DH; Kim, HJ; Hwang, SI; Shin, MC; Kang, JH; Ryu, Seung-Tak, Custom Integrated Circuits Conference(CICC), IEEE, 2014-09-17 |
| An Area-Efficient Iterative Modified-Booth Multiplier Based on Self-Timed Clocking Park, In-Cheol; Shin, MC; Kang , SH, IDEC Conference 2002 Summer, pp.119 - 122, 2002 |
| Multi-thread VLIW processor architecture for HDTV decoding Kim, H; Yang, WS; Shin, MC; Min, SJ; Bae, SO; Park, In-Cheol, CICC 2000: 22nd Annual Custom Integrated Circuits Conference, pp.559 - 562, CICC, 2000-05-21 |
| Optimal down-conversion in compressed DCT domain with minimal operations Shin, MC; Park, In-Cheol, Visual Communications and Image Processing 2000, pp.1613 - 1620, SPIE, 2000-06-20 |
| Processor-based turbo interleaver for multiple third-generation wireless standards Shin, MC; Park, In-Cheol, IEEE COMMUNICATIONS LETTERS, v.7, pp.210 - 212, 2003-05 |
| Programmable Turbo Decoder Supporting Multiple Third-Generation Wireless Standards 박인철; Shin, MC, SOC Design Conference, 2002-10 |
| SIMD processor-based turbo decoder supporting multiple third-generation wireless standards Shin, MC; Park, In-Cheol, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.15, no.7, pp.801 - 810, 2007-07 |
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