Showing results 1 to 4 of 4
A 5-Gb/s/pin transceiver for DDR memory interface with a crosstalk suppression scheme Oh, K.-I.; Kim, Lee-Sup; Park, K.-I.; Jun, Y.-H.; Kim, K., IEEE 2008 Custom Integrated Circuits Conference, CICC 2008, pp.639 - 642, 2008-09-21 |
A 6Gb/s/pin pseudo-differential signaling using common-mode noise rejection techniques without reference signal for DRAM interfaces Ha, K.-S.; Kim, Lee-Sup; Bae, S.-J.; Park, K.-I.; Choi, J.S.; Jun, Y.-H.; Kim, K., 2009 IEEE International Solid-State Circuits Conference ISSCC 2009, pp.138 - 139, 2009-02-08 |
A DLL with jitter-reduction techniques for DRAM interfaces Kim, B.-G.; Kim, Lee-Sup; Park, K.-I.; Jun, Y.-H.; Cho, S.-I., 54th IEEE International Solid-State Circuits Conference, ISSCC 2007, pp.496 -, 2007-02-11 |
Cancelation of a crosstalk induced noise in a DDR memory interface Oh, K.-I.; Kim, Lee-Sup; Park, K.-I.; Jun, Y.-H.; Kim, K., 2008 International SoC Design Conference, ISOCC 2008, 123, 2008-11-24 |
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