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A 14.2 mW 2.55-to-3 GHz Cascaded PLL With Reference Injection and 800 MHz Delta-Sigma Modulator in 0.13 mu m CMOS Park, Dong-Min; Cho, Seong-Hwan, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.47, no.12, pp.2989 - 2998, 2012-12 |
A Low-Noise and Low-Power Frequency Synthesizer Using Offset Phase-Locked Loop in 0.13-mu m CMOS Park, Pyoung-Won; Park, Dong-Min; Cho, Seong-Hwan, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, v.20, pp.52 - 54, 2010-01 |
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