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Showing results 1 to 6 of 6

1
Design and implementation of computationally efficient FIR filters, and scalable VLSI architectures for discrete wavelet transform = 연산이 효율적인 유한응답 여파기의 설계와 구현 및 이산 웨이브릿 변환의 가변 VLSI 구조에 관한 연구link

Kim, Joon-Tae; 김준태; et al, 한국과학기술원, 1998

2
Design of discrete coefficient FIR and IIR digital filters with prefilter-equalizer structure using linear programming

Oh, HJ; Lee, Yong-Hoon, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, v.47, no.6, pp.562 - 565, 2000-06

3
Low power architecture of discrete wavelet transform using pseduo circular cache = Pseudo circular cache를 이용한 저전력 웨이블릿 변환 구조link

Han, Chang-Young; 한창영; et al, 한국과학기술원, 2000

4
On the use of interpolated second-order polynomials for efficient filter design in programmable downconversion

Oh, HJ; Kim, S; Choi, G; Lee, Yong-Hoon, IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, v.17, no.4, pp.551 - 560, 1999-04

5
(The) design of time interleaved capacitive sensor for touch panel applications = 터치 스크린 적용을 위한 시간 인터리브 방식 정전용량 센서의 설계link

Ko, Seung-Hoon; 고승훈; et al, 한국과학기술원, 2010

6
무선 수신기를 위한 아날로그 FIR 채널 선택 필터 = Analog FIR channel-select filter for wireless receiverlink

안덕주; Ahn, Duk-Ju; et al, 한국과학기술원, 2010

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