Browse "School of Electrical Engineering(전기및전자공학부)" by Author Lee, S.-H.
Showing results 1 to 10 of 10
| A low power pipelined analog-to-digital converter using series sampling capacitors Cho, SeongHwan; Ock, S.; Lee, S.-H.; Lee, J.-S., IEEE International Symposium on Circuits and Systems 2005, ISCAS 2005, pp.6178 - 6181, 2005-05-23 |
| A precise temperature-insensitive and linear-in-dB variable gain amplifier Beck, S.; Hwang, M.-W.; Lee, S.-H.; Cho, Gyu-Hyeong; Lee, J.-R., Proceedings of the 2003 IEEE International Symposium on Circuits and Systems, v.1, 2003-05-25 |
| A prediction packetizing scheme for reducing channel traffic in transaction-level hardware/software co-emulation Lee, J.-G.; Chung, M.-K.; Ahn, K.-Y.; Lee, S.-H.; Kyung, Chong-Min, Design, Automation and Test in Europe, DATE '05, pp.384 - 389, DATE '05, 2005-03-07 |
| An automatic face indexing framework for actor-based video services in an IPTV environment Choi, J.Y.; De Neve, W.; Lee, S.-H.; Ro, YongMan, 2010 International Conference on Consumer Electronics, ICCE 2010, pp.81 - 82, IEEE, 2010-01-11 |
| Channel engineering of silicon nanowire field effect transistor: Non-equilibrium Green's function study Hong, K.-H.; Kim, J.; Lee, S.-H.; Jin, Y.-G.; Park, S.-I.; Shin, Mincheol; Suk, S.D.; et al, ICSICT-2006: 2006 8th International Conference on Solid-State and Integrated Circuit Technology, pp.1281 - 1283, 2006-10-23 |
| Cycle-accurate verification of AHB-based RTL IP with transaction-level system environment Shim, H.; Lee, S.-H.; Woo, Y.-S.; Chung, M.-K.; Lee, J.-G.; Kyung, Chong-Min, 2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2006, pp.135 - 138, 2007-04-26 |
| SoC design environment with automated configurable bus generation for rapid prototyping Lee, S.-H.; Lee, J.-G.; Kim, S.; Hwangbo W.; Kyung, Chong-Min, ASICON 2005: 2005 6th International Conference on ASIC, v.1, pp.122 - 125, 2005-10-24 |
| Stability analysis of switched systems with impulse effects Lee, S.-H.; Lim, Jong-Tae, Proceedings of the 1999 IEEE International Symposium on Intelligent Control - Intelligent Systems and Semiotics, pp.79 - 83, 1999-09-15 |
| System-level HW/SW Co-simulation framework for multiprocessor and multithread SoC Chung, M.-K.; Yang, S.; Lee, S.-H.; Kyung, Chong-Min, 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT), v.2005, pp.177 - 180, 2005-04-27 |
| The effects of Ge composition and Si cap thickness on hot carrier reliability of Si/Sil-xGex/Si p-MOSFETs with high-K/metal gate Loh, W.-Y.; Majhi, P.; Lee, S.-H.; Oh, J.-W.; Sassman, B.; Young, C.; Bersuker, G.; et al, 2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT, pp.56 - 57, 2008-06-17 |
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