Showing results 1 to 4 of 4
A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator Kim, Young-Ju; Chung, Sang-Hye; Ha, Kyung-Soo; Bae, Seung-Jun; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.62, no.10, pp.2495 - 2503, 2015-10 |
A Forwarded-Clock Receiver With Constant and Wide-Range Jitter-Tracking Bandwidth Chung, Sang-Hye; Kim, Young Ju; Ha, Kyung-Soo; Bae, Seung-Jun; Lee, Jung-Bae; Kim, Lee-Sup, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.61, no.3, pp.153 - 157, 2014-03 |
(A) study on signaling methods and circuits for a high speed memory interface = 고속의 메모리 인터페이스를 위한 시그널링 방법과 회로에 관한 연구link Ha, Kyung-Soo; 하경수; et al, 한국과학기술원, 2010 |
An 8Gb/s 0.65mW/Gb/s Forwarded Clock Receiver Using an ILO with Dual Feedback Loop and Quadrature Injection Scheme Seol, Jihwan; Kim, Young-Ju; Chung, Sang-Hye; Ha, Kyung-Soo; Bae, Seung-Jun; Lee, Jung-Baee; Choi, Joo Sun; et al, 2013 International Solid-State Circuits Conference, pp.410 - 411, IEEE, 2013-02-20 |
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