Browse "School of Electrical Engineering(전기및전자공학부)" by Author Cho, JW
Showing results 1 to 6 of 6
| A Content Delivery Accelerator in data-intensive servers Cho, JW; Choi, HJ; Lim, SH; Park, Kyu Ho, NETWORK AND PARALLEL COMPUTING, PROCEEDINGS BOOK SERIES: LECTURE NOTES IN COMPUTER SCIENCE, v.3779, pp.387 - 395, 2005 |
| Analog Neuro-chips with On-chip Learning Capability for Active Noise Cancelling Cho, JW; Lee, Soo-Young, International Conference on Neural Information Processing, pp.101 - 104, 1998-10 |
| Analog neuro-chips with on-chip learning capability for adaptive nonlinear equalizers Cho, JW; Lee, Soo-Young, Proceedings of the 1998 IEEE International Joint Conference on Neural Networks. Part 1 (of 3), pp.581 - 586, IEEE, 1998-05-04 |
| Analog on-chip-learning for active noise canceling Cho, JW; Lee, Soo-Young, NEUROCOMPUTING, v.31, no.1-4, pp.185 - 190, 2000-03 |
| Analogue neuro-chip with on-chip learning capability for adaptive nonlinear equalisers Cho, JW; Lee, Soo-Young, ELECTRONICS LETTERS, v.33, no.22, pp.1886 - 1887, 1997-10 |
| Modular neuro-chip with on-chip learning and adjustable learning parameters Choi, YK; Lee, Soo-Young; Cho, JW, NEURAL PROCESSING LETTERS, v.4, no.1, pp.45 - 52, 1996-12 |
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