Showing results 3 to 11 of 11
Co-Development of Media Processor and Source-level Debugger Using Hardware Emulation Kyung, Chong-Min; Kim, B.W.; Kang, K.G.; Nam, S.J.; Im, Y.H.; Chang, S.I., International Conference on Signal Processing Application and Technology(ICSPAT), 1999-11 |
Co-development of Media-processor and Source-level Debugger using Emulation-based Validation Kyung, Chong-Min; Im, Y.H.; Nam, S.J.; Kim, B.W.; Kang, K.G.; Lee, D.H.; Yang, J.H.; et al, International Conference on VLSI and CAD(ICVC'99), pp.95 - 98, 1999-10 |
DIVA:Dual-Issue VLIW Architecture with Media Instructions for Image Processing Nam, S.J.; Kwon, Y.S.; Park, In-Cheol; Kyung, Chong-Min, 대한전자공학회 CAD 및 VLSI 설계연구회 학술발표회, pp.117 - 122, 대한전자공학회, 1999 |
Fast Development of Source-level Debugging System Using Hardware Emulation Kyung, Chong-Min; Nam, S.J.; Lee, J.H.; Kim, B.W.; Im, Y.H.; Kwon, Y.S.; Kang, K.G., ASP-DAC'2000, 2000-01 |
FLOVA:A Four0-Issue Media Processor with 3D Geometry Kyung, Chong-Min; Nam, S.J.; Kwon, Y.S.; Kim, B.W.; Im, Y.H.; Kang, K.G., International Conference on Signal Processing Application and Technology(ICSPAT), 1999-11 |
MataCore : An Application Specific DSP Development System Park, Kyu Ho; Yang, J.H.; Kim, B.W.; Nam, S.J.; Cho, J.H.; Seo, S.W.; Kwon, Y.S.; et al, Design Automation Conference, pp.15 - 19, 1998 |
MetaCore: An application specific DSP development system Yang, J.H.; Kim, B.W.; Nam, S.J.; Cho, J.H.; Seo, S.W.; Ryu, C.H.; Kwon, Y.S.; et al, 35th Design Automation Conference, pp.800 - 803, IEEE, 1998-06 |
MetaCore:A Configurable & Instruction-Level Extensible DSP Core Kyung, Chong-Min; Yang, J.H.; Kim, B.W.; Seo, S.W.; Nam, S.J.; Ryu, C.H.; Cho, J.H., ASP-DAC'98, pp.325 - 326, ASP-DAC, 1998-02 |
VLIW Geometry Processor for 3D Graphics Accelearation Kyung, Chong-Min; Nam, S.J.; Kim, B.W.; Im, Y.H.; Kwon, Y.S.; Kang, K.G., Cool Chips II, pp.107 - 120, 1999-04 |
Discover