Browse "School of Electrical Engineering(전기및전자공학부)" by Title
Showing results 32461 to 32480 of 50984
| Results of CE S4h : Geometrical(Vertex-Based) Representation Method Kim, Jae Kyoon, ISO/IEC JTC1/SC29/WG11 MPEG, 1997 |
| Results of Core Experiment S4h - Geometrical Representation Method Kim, Jae Kyoon, ISO/IEC JTC1/SC29/WG11 MPEG, 1997 |
| Results of Core Experiments S14 : Scalable Binary Shape Coding Kim, Jae Kyoon, ISO/IEC JTC1/SC29/WG11 MPEG, 1997 |
| Results of Shape Coding Core Experiment : S4a and S4h Kim, Jae Kyoon, MPEG96/1491, Maceio(Brazil), 1996 |
| Retargetable 컴파일러의 함수 calling convention = Function calling convention for a retargetable compilerlink 민소영; Min, So-Young; et al, 한국과학기술원, 2003 |
| Retention Characteristics of Nano Scale Ferroelectric VDF/TrFE Copolymer Film Lee, Hee Chul; Kim, WY; Lee, YS; Ka, DY; Kim, SY, 2007 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices, pp.336 - 339, 2007-06-01 |
| Retention failure analysis of metal-oxide based resistive memory Choi, Shinhyun; Lee, Jihang; Kim, Sungho; Lu, Wei D., APPLIED PHYSICS LETTERS, v.105, no.11, 2014-09 |
| Retention Mechanism in Double-Gate 1T Capacitorless DRAM by Using PiFET Structure Bae, Dong-il; Kim, Sungho; Choi, Yang-Kyu, Silicon Nanoelectronics Workshop, Silicon Nanoelectronics Workshop, 2007-07 |
| Retention Performance of Ferroelectric Polymer Film for Nonvolatile Memory Devices Kim, Woo-Young; Ka, Du-Youn; Cho, Byeong-Ok; Kim, Sang-Youl; Lee, Yong-Soo; Lee, Hee-Chul, IEEE ELECTRON DEVICE LETTERS, v.30, no.8, pp.822 - 824, 2009-08 |
| Retention Secured Nonlinear and Self-Rectifying Analog Charge Trap Memristor for Energy-Efficient Neuromorphic Hardware Kim, Geunyoung; Son, Seoil; Song, Hanchan; Jeon, Jae Bum; Lee, Jiyun; Cheong, Woon Hyung; Choi, Shinhyun; et al, ADVANCED SCIENCE, v.10, no.3, 2023-01 |
| Rethinking deduplication in cloud: From data profiling to blueprint Kim, C; Park, KW; Park, K; Park, Kyu Ho, The 7th International Conference on Networked Computing and Advanced Information, NCM 2011, pp.101 - 104, 2011-06-22 |
| Rethinking Efficacy of Softmax for Lightweight Non-local Neural Networks Cho, Yooshin; Kim, Youngsoo; Cho, Hanbyel; Ahn, Jaesung; Hong, Hyeong Gwon; Kim, Junmo, IEEE International Conference on Image Processing, ICIP 2022, pp.1031 - 1035, IEEE, 2022-10-16 |
| Rethinking Network Policy Coordination: A Database Perspective Wang, Anduo; Shin, Seungwon; Dragut, Eduard, The 3rd Asia-Pacific Workshop on Networking, co-located with SIGCOMM (APNET 2019), pp.29 - 35, ACM, 2019-08-18 |
| Rethinking Training Schedules for Verifiably Robust Networks Go, Hyojun; Byun, Junyoung; Kim, Changick, IEEE International Conference on Image Processing (ICIP), pp.464 - 468, IEEE Signal Processing Society, 2021-09 |
| Rethinking training schedules for verifiably robust neural networks = 검증 가능하게 강건한 뉴럴 네트워크를 위한 훈련 과정 재고link Go, Hyojun; Kim, Changick; et al, 한국과학기술원, 2022 |
| Rethinking virtual network embedding: Substrate support for path splitting and migration Yu, Minlan; Yi, Yung; Rexford, Jennifer; Chiang, Mung, COMPUTER COMMUNICATION REVIEW, v.38, no.2, pp.19 - 29, 2008-04 |
| Retimed decomposed serial berlekamp-massey architecture for high-speed reed-solomon decoding = 고속 리드 솔로몬 디코딩을 위한 시간 조정되고 분해된 직렬 Berlekamp-Massey 구조link Rizwan, Shahid; 리즈완, 샤히드; et al, 한국과학기술원, 2005 |
| Retiming and time borrowing: Optimizing high-performance pulsed-latch-based circuits Lee, S.; Paik, S.; Shin, Youngsoo, 2009 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2009, pp.375 - 380, ACM SIGDA and IEEE CEDA, 2009-11-02 |
| Retiming pulsed-latch circuits for high-performance ASIC designs = 고성능 ASIC 디자인을 위한 펄스 래치 회로 리타이밍 기법link Lee, Seong-Gwan; 이성관; et al, 한국과학기술원, 2010 |
| Retiming Pulsed-Latch Circuits with Regulating Pulse Width Paik, Seung-Whun; Lee, Seong-Gwan; Shin, Young-Soo, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.30, no.8, pp.1114 - 1127, 2011-08 |
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