Browse "School of Electrical Engineering(전기및전자공학부)" by Subject interconnect
Showing results 1 to 7 of 7
| A 16-Gbps high-speed OOK modulator for millimeter-wave chip-to-chip communications = 밀리미터파를 이용한 칩 간 통신용 OOK 16Gbps 고속 변조기link Yoon, Chong-Hyun; 윤종현; et al, 한국과학기술원, 2014 |
| A Framed-Pulsewidth Modulation Transceiver for High-Speed Broadband Communication Links Jeon, Sejun; Kwon, Woohyun; Yoon, Jong-Hyeok; Yoon, Taehun; Kwon, Kyeongha; Yang, Jaehyeok; Bae, Hyeon-Min, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.67, no.8, pp.2825 - 2835, 2020-08 |
| Performance-driven event-based synchronization for multi-FPGA simulation accelerator with event time-multiplexing bus Kwon, YS; Kyung, Chong-Min, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.24, pp.1444 - 1456, 2005-09 |
| Power analysis of VLSI interconnect with RLC tree models and model reduction Shin, Youngsoo; Lee, J, JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.15, no.3, pp.399 - 408, 2006-06 |
| Power distribution-analysis of VLSI interconnects using model order reduction Shin, Youngsoo; Sakurai, T, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.21, no.6, pp.739 - 745, 2002-06 |
| Security considerations in processor interconnect design = 프로세서 인터커넥트 네트워크에서의 보안문제link Song, Won-Jun; 송원준; et al, 한국과학기술원, 2014 |
| Signal Integrity Modeling and Analysis of Large-Scale Memristor Crossbar Array in a High-Speed Neuromorphic System for Deep Neural Network Shin, Taein; Park, Shinyoung; Kim, Seongguk; Kim, Subin; Son, Kyungjune; Park, Hyunwook; Lho, Daehwan; et al, IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, v.11, no.7, pp.1122 - 1136, 2021-07 |
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