Browse "School of Electrical Engineering(전기및전자공학부)" by Title
Showing results 39301 to 39320 of 51650
| VLSI implementation for high-throughput turbo decoder with parallel architecture = 병렬 구조를 가지는 고속 터보 디코드의 VLSI 구현link Kwak, Jae-Young; 곽재영; et al, 한국과학기술원, 2003 |
| VLSI Implementation for Interpolation-based Matrix Inversion for 802.11n Receivers Park, Sin Chong, ITC-CSCC2007 |
| VLSI Implementation for Interpolation-based Matrix Inversion for MIMO-OFDM Receivers Park, Sin Chong, WSEAS |
| VLSI implementation of area-efficient list sphere decoder Lee S.; Lee J.; Park, Sin Chong, 2006 International Conference on Communication Technology, ICCT '06, 2006-11-27 |
| VLSI Implementation of Area-efficient List Sphere Decoder Park, Sin Chong, ISPACS 2006 |
| VLSI implementation of ATM layer functions for ATM UNI/NNI Choi, SH; Kim, YS; Han, YM; Park, Hong-Shik, ITC-CSCC, v.49, no.6, pp.269 - 273, 대한전자공학회, 1996 |
| VLSI implementation of decoder for decompressing fractal-based compressed image Kim, KH; Hong, CY; Kim, Lee-Sup, Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6), pp.221 - 224, IEEE, 1998-05-31 |
| VLSI Implementation of List Sphere Decode Park, Sin Chong, ICCCA 2006 |
| VLSI Implementation of List Sphere Decoder Park, Sin Chong, ITC-CSCC2006 |
| VLSI Implementation of Multi-Layer Bidirectional Associative Memory Choi, Y.K.; Jeong, D.G.; Lee, Soo-Young, 2nd Annual Meeting of Korean Neural Network Study Group, 1991-06 |
| VLSI implementation of neural network with on-chip learning capability = 학습능력을 가지는 신경회로망의 VLSI 구현link Choi, Yoon-Kyung; 최윤경; et al, 한국과학기술원, 1996 |
| VLSI implementation of Phong shader in 3D graphics Sin, HC; Lee, JA; Kim, Lee-Sup, Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6), pp.417 - 420, IEEE, 1998-05-31 |
| VLSI Implementation of Radial Basis Function Network with Learning Capability Lee, Soo-Young, Int. Conf. on Neural Information, pp.1341 - 1346, ICONIP, 1994-10 |
| VLSI Implementation of Tree Searching Logic in List Sphere Decoder Park, Sin Chong, ICWMMN 2006 |
| VLSI Implementation of Weighted Order Statistic Filters S.W.Kim; K.D.Lee; Y.H.Lee, 전자공학회논문지, v.28, no.8, pp.599 - 691, 1991-08 |
| VLSI Neural Network과 Trimming Analog 회로를 위한 고속, 고분해능 CMOS 아날로그 메모리 이귀로; 김규현, 대한전자공학회 학술대회 , pp.139 - 140, 대한전자공학회, 1995 |
| VLSI Realization of Symmetric Block Matching Algorithm Kim, Seong-Dae; Kim, SY; Lee, JH, International Workshop on HDTV, pp.301 - 308, 1992 |
| VLSI Realization of Symmetric Block-Matching Algorithm Kim, Seong-Dae; Kim, SY, International Workshop on HDTV, pp.77 - 78, 1992 |
| VLSI 구현을 위한 대칭적인 블록 정합 알고리즘 김성대; 김상연; 이정희; 장규환; 이기봉, 신호처리 합동학술대회, pp.484 - 488, 1992 |
| VLSI 설계 자동화에 대한 연구 경종민, 한국자동제어학술회의, pp.623 - 628, 1986 |
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