We present an antenna coupled non-resonant plasma-wave CMOS detector operating at 502 GHz, with a PMOS load and NMOS stacked structure. The gates of the NMOS plasma wave FETs, which are located in the middle of the stack, in a differential structure, are connected to the voltage-maximum points of a patch antenna. It was found that the high-input impedance of the detector causes high responsivity as the loaded Q of the antenna is enhanced and because the resultant high-voltage swing at the input allows the detector to have high responsivity. High input impedance can be achieved via using the stacked structure in conjunction with a small input transistor and the sub-threshold bias. The responsivity of stacked structure was also affected by source-drain voltage in the plasma-wave FET and active load resistor by PMOS. Therefore, it was found that the responsivity is closely related to the V-ds x I-ds x r(load)* product of the stacked structure, where I-ds is the bias current, V-ds is the voltage across the input NMOS plasma-wave FET and is the small signal resistance of the PMOS load parallel with plasma-wave FET channel resistance. The detector shows the higher response than a cold-FET detector by one order of magnitude.