DC Field | Value | Language |
---|---|---|
dc.contributor.author | 여세동 | ko |
dc.contributor.author | 박인철 | ko |
dc.date.accessioned | 2015-06-24T02:03:55Z | - |
dc.date.available | 2015-06-24T02:03:55Z | - |
dc.date.created | 2015-06-11 | - |
dc.date.issued | 2014-06 | - |
dc.identifier.citation | 대한전자공학회 하계학술대회 | - |
dc.identifier.uri | http://hdl.handle.net/10203/198888 | - |
dc.description.abstract | A hardware design for the adaptive loop filter(ALF) cores characterized by the high throughput and low area is proposed for improving the subjective video quality. The main idea for the ALF is to minimize the mean square error between original pixels and decoded pixels by using Wiener filter. In this architecture, a combination of 9×7-tap cross shape and a 3×3-tap rectangular shape is used for the filter shape. This work is focused on the filtering process assuming that the filter coefficients are known. The proposed architecture is implemented in 130nm CMOS process, and achieves the result that reduces gate count(NAND2) about 20% compared to existing hardware at maximum operation frequency(416MHz). | - |
dc.language | Korean | - |
dc.publisher | 대한전자공학회 | - |
dc.title | 저면적, 고성능의 HEVC 적응적 루프 필터 설계 | - |
dc.title.alternative | Low Area and High Throughput Hardware Design for the Adaptive Loop Filter in HEVC | - |
dc.type | Conference | - |
dc.type.rims | CONF | - |
dc.citation.publicationname | 대한전자공학회 하계학술대회 | - |
dc.identifier.conferencecountry | KO | - |
dc.identifier.conferencelocation | 제주 | - |
dc.contributor.localauthor | 박인철 | - |
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