DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Kim, Soon-Tae | - |
dc.contributor.advisor | 김순태 | - |
dc.contributor.author | Rouf, Mohammad Abdur | - |
dc.contributor.author | 루프 모하매드 압도 | - |
dc.date.accessioned | 2015-04-23T08:12:52Z | - |
dc.date.available | 2015-04-23T08:12:52Z | - |
dc.date.issued | 2014 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=591853&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/197797 | - |
dc.description | 학위논문(박사) - 한국과학기술원 : 정보통신공학과, 2014.8, [ xi, 111p. ] | - |
dc.description.abstract | Embedded systems are becoming more susceptible to transient errors because of miniaturization of VLSI circuits and reduction of voltage levels. These errors affect the processor`s pipeline and hence its data and control flows. Data errors are two types: (i) computational errors due to incorrect results from functional units, and (ii) memory errors occur due to corruption of the stored data. However, errors in control flow can change the program`s execution sequence, which might be catastrophic for safety-critical applications. Vulnerabilities to transient errors in a microprocessor system were previously performed for instruction queues, execution units, register files, read/write buffers, instruction and data caches, and translation look aside buffers. However, control flow vulnerabilities have not been explored extensively. The author makes a model to evaluate the program`s Vulnerability Factor of Control Flow (VFCF) in a pipelined processor. VFCF is investigated for a program under different compiler optimization strategies. It is observed that different programs show various degrees of VFCF against compiler optimizations flags. To better evaluate the VFCF, author redevelops VFCF model referred to as CFV model which integrates normalized instructions, branches, taken branches and execution cycles. Conventional techniques are either software-based or hardware-based to overcome control flow vulnerabilities. Software-based techniques suffer from increased code-size overhead and have a negative impact on energy consumption and performance degradation. On the other hand, hardware-based schemes incur high hardware and area costs. Author proposes two low-cost control flow vulnerability reduction mechanisms: (i) hardware-based low-cost control flow error checking scheme and (ii) code transformation scheme. Low-cost Control Flow Error Checking (CFEC) scheme is a hardware-based technique that exploits available redundancies in the microprocessor`s pipel... | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | Reliability | - |
dc.subject | 코드변환 | - |
dc.subject | 컴파일러 최적화 | - |
dc.subject | 제어흐름 취약성 | - |
dc.subject | 저전력 | - |
dc.subject | 신뢰성 | - |
dc.subject | low-power | - |
dc.subject | control-flow vulnerability | - |
dc.subject | compiler optimiztions | - |
dc.subject | code transformations | - |
dc.title | Control flow vulnerability: Modeling, evaluation and low-cost hardware/software solutions. | - |
dc.title.alternative | 제어 흐름 취약성: 모델링, 평가, 그리고 저비용 하드웨어/소프트웨어 해법. | - |
dc.type | Thesis(Ph.D) | - |
dc.identifier.CNRN | 591853/325007 | - |
dc.description.department | 한국과학기술원 : 정보통신공학과, | - |
dc.identifier.uid | 020088117 | - |
dc.contributor.localauthor | Kim, Soon-Tae | - |
dc.contributor.localauthor | 김순태 | - |
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