Design of linear and noiseless self-jammer cancellation circuit in UHF RFID

Abstract

In this thesis, a novel design method and implementation is presented for the passive self-jammer cancella-tion circuit with mismatch impedance at the coupling port of a directional coupler in the monostatic, passive, and UHF RFID reader’s front-end module. First, a new graphical and quantitative interpretation on the pas-sive self-jammer cancellation is proposed. Using this interpretation the required coverage and resolution of the mismatch impedance circuit are derived. Second, linear and noiseless cancellation circuit based on digital-ly tunable capacitor (DTC) is designed so that the circuit meets the derived specifications. The mismatch im-pedance consists simply of a power divider and two DTCs. This scheme was implemented on a PCB, along with commercial RFID transceiver chip and other supporting circuitry. Then the experimental results verify that the proposed cancellation scheme actually improves the reading range by three fold as well as the re-ceiver sensitivity. Finally, A simple but effective calibration algorithm is proposed to adaptively control the impedance through the integrated received signal strength indicator (RSSI) so that the circuit guarantees isola-tion of over 50dB against all environmental and process variations.