On-chip learning multi-class support vector machine processor

Abstract

An on-chip learning and multi-class Support Vector Machine processor has been designed and implemented for pattern recognition application. Support Vector Machine has been known as the best accurate classification algorithm in a general application. However, there exist few hardware implementations due to its high computational costs. In order to implement hardware with capabilities of on-chip learning and multi-category, the multi-class learning algorithm and appropriate hardware architecture are proposed. The proposed low-cost multi-category learning algorithm based on a decision tree reduces the execution time for both of learning and classification phases; in addition, its memory cost is also reduced. The proposed hardware architecture adopts 20-way SIMD processor with Kernel-Support Vector cache for low-power and low-latency kernel operation, and the proposed memory control system reduces the memory requirement for multi Support Vector Machine. As a result, the implemented chip achieves 180 M vectors per second processing performance while consuming only 106 mW for the entire system. The evaluation board has been developed for the further demonstration of pattern recognition application.