DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Park, Chul-Soon | - |
dc.contributor.advisor | 박철순 | - |
dc.contributor.author | Kim, Woo-Young | - |
dc.contributor.author | 김우영 | - |
dc.date.accessioned | 2015-04-23T06:12:27Z | - |
dc.date.available | 2015-04-23T06:12:27Z | - |
dc.date.issued | 2014 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=568564&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/196528 | - |
dc.description | 학위논문(박사) - 한국과학기술원 : 전기및전자공학과, 2014.2, [ xi, 90 p. ] | - |
dc.description.abstract | For the multi-band CMOS hybrid-EER power amplifier (PA) for mobile application, a triple-band CMOS power amplifier is designed and, to compensate nonlinearity of the supply modulated structure, a common-gate voltage modulation (CGVM) on-chip linearizer is integrated in the circuit. To support multi-band/multi-mode operations, the hybrid-EER is implemented with the multi-mode envelope amplifier (EA) and the multi-band power amplifier. The designed PA is fabricated with CMOS process and fully integrated the EA and the PA on a single chip. Firstly, the proposed triple-band PA is applied two techniques to operate multi-band operation with a power-cell resizing and a multi-tap transformer. To operate optimum class-E mode, the required capacitance and inductance are realized with parasitic capacitance of power cells and the variable inductance of a transmission line transformer (TLT) using multi-taps with supply voltage biasing. The designed PA operates 800 MHz and 1.9/2.3 GHz with high power added efficiency (PAE) of 40/45/37 % and output power of 28/29.6/26.5 dBm. Secondly, the nonlinearity of the supply modulated scheme is generated with the nonlinear output capacitance and the variation of the output resistance as a function of the supply voltage. This nonlinearity produces AM-to-AM and AM-to-PM distortions and the third-order intermodulation (IM3) distortion. To improve the nonlinearity, the CGVM scheme is applied to the gate bias of the common-gate stage of the cascode amplifier in the designed PA. The on-chip linearizer is integrated with a linear regulator using an OP-AMP. The shaped envelope can control the common-gate stage operated in the saturation region to keep the load resistance constant value. To apply the proposed technique, the linearity are improved 4.5 dB (WCDMA) and 3 dB (LTE) signals. Thirdly, the multi-band CMOS H-EER PA is designed in a single chip using CMOS process for 3G and 4G mobile applications. The input/output matching networks are i... | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | multi-band | - |
dc.subject | wcdma | - |
dc.subject | lte | - |
dc.subject | cmos | - |
dc.subject | Power amplier | - |
dc.subject | 전력증폭기 | - |
dc.subject | 다중대역 | - |
dc.title | A Multi-Band CMOS hybrid-EER power amplifier for mobile applications | - |
dc.title.alternative | 휴대 단말용 다중대역 CMOS Hybrid-EER 전력증폭기 설계 | - |
dc.type | Thesis(Ph.D) | - |
dc.identifier.CNRN | 568564/325007 | - |
dc.description.department | 한국과학기술원 : 전기및전자공학과, | - |
dc.identifier.uid | 020078055 | - |
dc.contributor.localauthor | Park, Chul-Soon | - |
dc.contributor.localauthor | 박철순 | - |
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