Simulation Verification for Layout Design - Is shortest distance always good?
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, Junghoon | ko |
| dc.contributor.author | Jang, Young Jae | ko |
| dc.date.accessioned | 2015-03-27T07:01:02Z | - |
| dc.date.available | 2015-03-27T07:01:02Z | - |
| dc.date.created | 2015-01-02 | - |
| dc.date.issued | 2014-08-17 | - |
| dc.identifier.citation | The 2014 International Symposium on Semiconductor Manufacturing Intelligence | - |
| dc.identifier.uri | http://hdl.handle.net/10203/194413 | - |
| dc.language | English | - |
| dc.publisher | International Symposium on Semiconductor Manufacturing Intelligence | - |
| dc.title | Simulation Verification for Layout Design - Is shortest distance always good? | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.citation.publicationname | The 2014 International Symposium on Semiconductor Manufacturing Intelligence | - |
| dc.identifier.conferencecountry | CH | - |
| dc.identifier.conferencelocation | Fullon Hotel Tamsui Fishermen’s Wharf, New Taipei City | - |
| dc.contributor.localauthor | Jang, Young Jae | - |
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